# SDR vs DDR register setting for LMS7002M

**URL:** <https://discourse.myriadrf.org/t/sdr-vs-ddr-register-setting-for-lms7002m/2629>\
**Category:** LimeSDR\
**Created:** [13 April 2018 16:04 UTC](https://discourse.myriadrf.org/t/sdr-vs-ddr-register-setting-for-lms7002m/2629 "2018-04-13T16:04:39Z")\
**Posts on this page:** 2\
**Page:** 1

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**Author:** ![Sombrero](https://avatars.discourse-cdn.com/v4/letter/s/94ad74/32.png) [@Sombrero](https://discourse.myriadrf.org/u/Sombrero)\
**Post date:** [13 April 2018 16:04 UTC](https://discourse.myriadrf.org/t/sdr-vs-ddr-register-setting-for-lms7002m/2629/1 "2018-04-13T16:04:39Z")

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Dear Lime Team,  
@Zack @andrewback

I would like to know which register is used to determine if the DIQ interface (TRXIQ) is utilized in SDR (single data rate) or DDR (double data rate) mode? I couldn’t find the specific register in the programming guide.

I found the registers 0x0022 and 0x0023 for the JESD/TRXIQ mode. However, according to the data sheet there are two options for TRXIQ the SDR and DDR mode.

Thank you very much!  
Best regards  
Sombrero

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**Author:** ![Victor](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/victor/32/2792_2.png) [@Victor](https://discourse.myriadrf.org/u/Victor)\
**Post date:** [26 March 2019 09:33 UTC](https://discourse.myriadrf.org/t/sdr-vs-ddr-register-setting-for-lms7002m/2629/2 "2019-03-26T09:33:16Z")

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Hi Sombrero, You could set up the mode? I also can’t adjust the mode.

 ![IQ_sel](https://canada1.discourse-cdn.com/flex034/uploads/myriadrf/original/2X/3/3904cc161a3d24849216411d90f57a55c9029d42.jpeg)