# RF Loopback Test FAILED, but TX and RX seems works

**URL:** <https://discourse.myriadrf.org/t/rf-loopback-test-failed-but-tx-and-rx-seems-works/5679>\
**Category:** LimeSDR\
**Created:** [26 January 2020 18:14 UTC](https://discourse.myriadrf.org/t/rf-loopback-test-failed-but-tx-and-rx-seems-works/5679 "2020-01-26T18:14:29Z")\
**Posts on this page:** 5\
**Page:** 1

<div class="post-metadata">

**Author:** ![jil2](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/jil2/32/3246_2.png) [@jil2](https://discourse.myriadrf.org/u/jil2)\
**Post date:** [26 January 2020 18:14 UTC](https://discourse.myriadrf.org/t/rf-loopback-test-failed-but-tx-and-rx-seems-works/5679/1 "2020-01-26T18:14:29Z")

</div>

Hello,

Before the first run of LimeSDR I’ve performed a test and everything was ok. After some time i got the RF Loopback Test FAILED.

I’ve checked both TX 1, LNA\_W of CH 0 (RX 1\_W and TX1\_1) and they are both seems working. No any noticeable difference between RX 1\_L or TX1\_2 for example. But test is still failed.

Could you please advise how this loopback is working? There is no any connection between RX 1\_W and TX1\_1. I can see there are some connection between TX 1/2\_2 and RX 1/2\_H on the schematic diagram but only for these two ports. Maybe it’s possible to found a faulty element and to replace it. Of course if it’s not a faulty IC.

Nothing was connected to the board.

Dear LimeSDR team could you please explain how the loopback works and could you please suggest what I can do with this error.

Logs are below:

==========================================================  
[TESTING STARTED]  
-\>Start time: Sun Jan 26 20:52:11 2020

-\>Device: LimeSDR-USB, media=USB 3.0, module=FX3, serial=00090726074F2410, index=0  
Serial Number: 00090726074F2410

[Clock Network Test]  
-\>FX3 GPIF clock test  
Test results: 34642; 38398; 42154 - PASSED  
-\>Si5351C test  
CLK0: 17554 / 17554 - PASSED  
CLK1: 17554 / 17554 - PASSED  
CLK2: 17554 / 17554 - PASSED  
CLK3: 17554 / 17554 - PASSED  
CLK4: 17554 / 17554 - PASSED  
CLK5: 17554 / 17554 - PASSED  
CLK6: 17554 / 17554 - PASSED  
-\>ADF4002 Test  
Result: 10 - PASSED  
-\>VCTCXO test  
Results : 5112962 (min); 5113093 (max) - PASSED  
-\>Clock Network Test PASSED

[FPGA EEPROM Test]  
-\>Read EEPROM  
-\>Read data: 12 07 19 12 07 19 02  
-\>FPGA EEPROM Test PASSED

[LMS7002M Test]  
-\>Perform Registers Test  
-\>External Reset line test  
Reg 0x20: Write value 0xFFFD, Read value 0xFFFD  
Reg 0x20: value after reset 0x0FFFF  
-\>LMS7002M Test PASSED

[RF Loopback Test]  
Note: The test should be run without anything connected to RF ports  
-\>Configure LMS  
-\>Run Tests (TX\_2-\> LNA\_L):  
CH0 (SXR=800.0MHz, SXT=805.0MHz): Result:(-14.3 dBFS, 5.00 MHz) - PASSED  
CH1 (SXR=800.0MHz, SXT=805.0MHz): Result:(-16.4 dBFS, 5.00 MHz) - PASSED  
-\>Run Tests (TX\_1 -\> LNA\_W):  
CH0 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-22.0 dBFS, 5.00 MHz) - FAILED  
CH1 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-17.3 dBFS, 5.00 MHz) - PASSED  
-\>Run Tests (TX\_2-\> LNA\_H):  
CH0 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-16.0 dBFS, 5.00 MHz) - PASSED  
CH1 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-13.7 dBFS, 5.00 MHz) - PASSED  
-\>RF Loopback Test FAILED

=\> Board tests FAILED \<=

# Elapsed time: 1.73 seconds

Thanks in advance.

---

<div class="post-metadata">

**Author:** ![ricardas](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/ricardas/32/86_2.png) [@ricardas](https://discourse.myriadrf.org/u/ricardas)\
**Post date:** [27 January 2020 00:10 UTC](https://discourse.myriadrf.org/t/rf-loopback-test-failed-but-tx-and-rx-seems-works/5679/2 "2020-01-27T00:10:10Z")

</div>

The TX\_1 -\> LNA\_W is chip’s internal loopback.  
`CH0 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-22.0 dBFS, 5.00 MHz) - FAILED`  
It is working, it just received a slightly lower signal. Looking at the source code, the expected level is -15±6dB, so it’s not that far from the lower threshold. Additionaly these values that you are getting can change depending on the chip/board temperature.

`Before the first run of LimeSDR I’ve performed a test and everything was ok.`  
I assume the chip was cold at that point so that’s why it passed. And after it warmed up it started getting different values.

---

<div class="post-metadata">

**Author:** ![jil2](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/jil2/32/3246_2.png) [@jil2](https://discourse.myriadrf.org/u/jil2)\
**Post date:** [27 January 2020 08:25 UTC](https://discourse.myriadrf.org/t/rf-loopback-test-failed-but-tx-and-rx-seems-works/5679/3 "2020-01-27T08:25:37Z")

</div>

Thank you for the answer!

Yes, I’ve noticed that this value (dBFS) depends on the chip/board temperature. But not so strong. It’s about 2-3 dBFS. And in the every beginning this value was around 16 -18 dBFS. Now it’s around 22dBFS.  
I hope that the absence of a heat sink will not affect the chip. The parameters will not degrade while using the device.

And another question is why the results of the test is changed?

---

<div class="post-metadata">

**Author:** ![ricardas](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/ricardas/32/86_2.png) [@ricardas](https://discourse.myriadrf.org/u/ricardas)\
**Post date:** [27 January 2020 22:18 UTC](https://discourse.myriadrf.org/t/rf-loopback-test-failed-but-tx-and-rx-seems-works/5679/4 "2020-01-27T22:18:40Z")

</div>

I’m not hardware engineer so don’t know answers to that.

---

<div class="post-metadata">

**Author:** ![jil2](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/jil2/32/3246_2.png) [@jil2](https://discourse.myriadrf.org/u/jil2)\
**Post date:** [4 February 2020 09:51 UTC](https://discourse.myriadrf.org/t/rf-loopback-test-failed-but-tx-and-rx-seems-works/5679/5 "2020-02-04T09:51:40Z")

</div>

Hello @Zack. Could you please comment on my issue. Why after some time RF Loopback would fail?
