[Resolved] SetFrequencySXR cannot deliver frequency, tune fail (LimeSDR-USB v1.2s)

zany · 22 December 2017 17:36

I just got a LimeSDR-USB v1.2s.

I behaves rather strange: on plugging it in (USB 3) it starts to transmit a carrier which is somewhat scarry.
I can tune the TX. Tuning the RX always fails with:

ERROR:SetFrequencySXR(1200 MHz) - cannot deliver frequency
INT: 152	FRAC: 262144
DIV_LOCH: 1	 EN_DIV2_DIVPROG: 0
VCO: 4800MHz	RefClk: 30.72 MHz
VCOL : csw=0 tune fail
VCOM : csw=0 tune fail
VCOH : csw=0 tune fail

I tried many frequencies from 50MHz to 2000MHz using Windows 10 with Pothos or OS X with LimeSuite.
I tried this with power-on defaults, reset and defaults buttons in the LimeSuiteGUI, with self_test.ini and example.ini.
The FFT does not show any RX signal at all.

Did I miss some required setting? Is there anything else I can test?

I updated to 17.12/LimeSDR-USB_HW_1.2_r3.0.img and 17.12/LimeSDR-USB_HW_1.1_r1.20.rbf

./LimeUtil/LimeUtil --update

Connected to [LimeSDR-USB [USB 3.0]]
Firmware version mismatch!
  Expected firmware version 3, but found version 0
  Follow the FW and FPGA upgrade instructions:
  http://wiki.myriadrf.org/Lime_Suite#Flashing_images
  Or run update on the command line: LimeUtil --update

Gateware version mismatch!
  Expected gateware version 1, revision 20
  But found version 1, revision 15
  Follow the FW and FPGA upgrade instructions:
  http://wiki.myriadrf.org/Lime_Suite#Flashing_images
  Or run update on the command line: LimeUtil --update

CLK0 fOut = 27 MHz  Multisynth Divider 33 0/1  R divider = 1 source = PLLA
CLK1 fOut = 27 MHz  Multisynth Divider 33 0/1  R divider = 1 source = PLLA
CLK2 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
CLK3 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
CLK4 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
CLK5 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
CLK6 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
CLK7 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
Si5351C: VCOA = 891 MHz  Feedback Divider 35 41943/65536
Si5351C: VCOB = 891 MHz  Feedback Divider 35 41943/65536
--2017-12-20 14:02:09--  http://downloads.myriadrf.org/project/limesuite/17.12/LimeSDR-USB_HW_1.2_r3.0.img
--2017-12-20 14:02:12--  http://downloads.myriadrf.org/project/limesuite/17.12/LimeSDR-USB_HW_1.1_r1.20.rbf
Programming update complete!

Neither ./bin/singleRX or ./LimeUtil/LimeUtil --cal --start 758e6 --stop 803e6 --chans=ALL --dir=RX work:

Error tuning (skipping): SetFrequencySXR(800 MHz) - cannot deliver frequency
INT: 100	FRAC: 174762
DIV_LOCH: 2	 EN_DIV2_DIVPROG: 1
VCO: 6400MHz	RefClk: 30.72 MHz
VCOL : csw=0 tune fail
VCOM : csw=0 tune fail
VCOH : csw=0 tune fail
	Selected : VCOH

SetFrequency using cache values vco:2, csw:0
Error calibrating (skipping): Feature is not available on this chip revision
SetFrequency using cache values vco:2, csw:0
Error calibrating (skipping): Feature is not available on this chip revision

./LimeUtil/LimeUtil --info

######################################################
## LimeSuite information summary
######################################################

Version information:
  Library version:	v17.12.0-gd352c002
  Build timestamp:	2017-12-20
  Interface version:	v2017.12.0
  Binary interface:	17.12-1

System resources:
  Installation root:	/usr/local
  User home directory:	/Users/me
  App data directory:	/Users/me/.local/share/LimeSuite
  Config directory:	/Users/me/.limesuite
  Image search paths:
     - /Users/me/.local/share/LimeSuite/images
     - /usr/local/share/LimeSuite/images

Supported connections:
   * PCIEXillybus
   * STREAM
   * uLimeSDR

./LimeUtil/LimeUtil --make

Make device
Reference clock 30.720 MHz
CLK0 fOut = 27 MHz  Multisynth Divider 33 0/1  R divider = 1 source = PLLA
CLK1 fOut = 27 MHz  Multisynth Divider 33 0/1  R divider = 1 source = PLLA
CLK2 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
CLK3 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
CLK4 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
CLK5 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
CLK6 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
CLK7 fOut = 27 MHz  Multisynth Divider 8 0/1  R divider = 1 source = PLLA
Si5351C: VCOA = 891 MHz  Feedback Divider 35 41943/65536
Si5351C: VCOB = 891 MHz  Feedback Divider 35 41943/65536
  Device name: LimeSDR-USB
  Expansion name: UNSUPPORTED
  Firmware version: 3
  Hardware version: 2
  Protocol version: 1
  Gateware version: 1
  Gateware revision: 20
  Gateware target: LimeSDR-USB
  Free connection... OK

andrewback · 22 December 2017 17:40

Where did you just get this from? It is a beta board that only went out to selected partners and developers. The current hardware — which all backers have — is v1.4

We’re not actively supporting pre-v1.4 boards, as there were changes to the hardware which would give us a lot of headaches for a relatively small number of boards. Plus of course the hardware was changed with good reason…

zany · 22 December 2017 18:17

It is indeed a developer board given out for integration and testing with selected open source projects. I just recieved it to complete the integration.
I don’t need the board for productive use as I have other SDR hardware. I’d be great to test the API and hardware though.
Is there some older firmware and software version I can use to get this running? It doesn’t need to perform well, limitations on frequency, accuraccy, and sample rate are quite acceptable.
Or is there some way I can upgrade the board? (my SMD soldering skills are rather limited though…)

andrewback · 22 December 2017 18:19

I’m not sure of the current status with Lime Suite and gateware/firmware for those boards. @ignasj can hopefully advise.

zany · 23 December 2017 12:10

I tried the oldest tagged LimeSuite (v16.12.0) with the oldest downloads I could find (17.01) but the output is still the same, no RX with “tune fail”.

LimeSDR-USB_HW_1.1_r1.20.rbf	07-Jan-2017 01:04 	544K	 
LimeSDR-USB_HW_1.2_r2.0.img	07-Jan-2017 01:10 	185K

Is there any older firmware /software version to try with the 1.2 hardware revision? Am I correct to assume that there was firmware /software version (sometime last year?) that the 1.2 revision was fully operable with?
I’m not yet ready to demote this fine hardware to a door stopper

zany · 23 December 2017 12:23

Well, poking around I just found the 16.06 files:

LimeSDR-USB_lms7_trx.rbf	07-Jun-2016 18:22 	398K
limesdr-usb_1.2.img	07-Jun-2016 18:24 	183K

Tuning still fails, but I get an FFT output! If I figure out how to tune manually all is good!

IgnasJ · 23 December 2017 15:41

Auto update downloads the latest FW/GW versions that were developed for older boards. Software is not being tested with older boards and some function (e.g. calibrations) definitely does not work with older boards.
You can try this LimeSuiteGUI version:
http://downloads.myriadrf.org/builds/limesuite/LimeSuiteGUI_MR2_478db355.exe

zany · 23 December 2017 16:38

Thanks for the indication of commit 478db355 (guessing from the name LimeSuiteGUI_MR2_478db355.exe).

LimeUtil --info

Library Version: v16.8.23.819-g478db355
Build timestamp: 2017-12-23
Connections: PCIEXillybus, STREAM, uLimeSDR,

There is no auto update on that version yet.

I tried:

LimeSDR-USB_lms7_trx.rbf
limesdr-usb_1.2.img

which somewhat works. There is data in the FFT viewer, though RX tuning is not possible (Calculate: “tune fail”).

LimeUtil --make reads:

Firmware version: 0
Hardware version: 2
Protocol version: 1
Gateware version: 1
Gateware revision: 11

Then

LimeSDR-USB_HW_1.1_r1.20.rbf
LimeSDR-USB_HW_1.2_r2.0.img

which also somewhat works. There is data in the FFT viewer, though RX tuning is not possible (Calculate: “tune fail”).

LimeUtil --make reads:

Firmware version: 2
Hardware version: 2
Protocol version: 1
Gateware version: 1
Gateware revision: 20

The newest fw “LimeSDR-USB_HW_1.2_r3.0.img” does not work with the v16.8.23.819-g478db355 software

Any advice on how to manually calculate and set a RX frequency (and bandwidth)? Those consistently fail (but I’m not afraid to just patch that out of the driver and do it the hard way).

Thanks!

zany · 23 December 2017 18:16

The problem with RX tuning seems to be that all

cmphl = (uint8_t)Get_SPI_Reg_bits(addrCMP, 13, 12, true);

in

int LMS7002M::TuneVCO(VCO_Module module) // 0-cgen, 1-SXR, 2-SXT

always returns “0”. No matter if I fudge the divider values or something.
If I set all cmphl checks to “2” the code works (just without actual tuning, I guess) and I can receive samples.

zany · 30 December 2017 12:00

After some intense debugging I conclude that the RX tuning is very likely broken on this device.
A work around is to always set EN_COARSEPLL so a frequency selection won’t abort. I.e I added

Modify_SPI_Reg_bits(LMS7param(EN_COARSEPLL), 1);

somewhere in the driver. So the issue can be seen as resolved.

However being stuck on the library Version v16.8.23.819-g478db355 is a limitation. E.g. I can stream RX samples but while the FFT viewer shows some activity the stream data is “deaf”. I wouldn’t avise bothering with a revision 1.2 hardware