# Possible hardware fault with LimeSDR USB

**URL:** https://discourse.myriadrf.org/t/possible-hardware-fault-with-limesdr-usb/4234
**Category:** LimeSDR
**Created:** [23 February 2019 11:57 UTC](https://discourse.myriadrf.org/t/possible-hardware-fault-with-limesdr-usb/4234 "2019-02-23T11:57:36Z")
**Posts on this page:** 3
**Page:** 1

<div class="post-metadata">

### Author: ![IamAComputer](https://avatars.discourse-cdn.com/v4/letter/i/8e7dd6/32.png) [@IamAComputer](https://discourse.myriadrf.org/u/IamAComputer)
#### Post date: [23 February 2019 11:57 UTC](https://discourse.myriadrf.org/t/possible-hardware-fault-with-limesdr-usb/4234/1 "2019-02-23T11:57:36Z")

</div>

Hello I noticed many errors while using SoapySDR and calibrating the LimeSDR. The error was always “Tx Calibration: MCU error 5 (Loopback signal weak: not connected/insufficient gain?)”

I have since run LimeQuickTest which also indicated an rf loopback problem: RF Loopback Test FAILED

```
[TESTING STARTED]
->Start time: Sat Feb 23 12:52:31 2019

->Device: LimeSDR-USB, media=USB 3.0, module=FX3, addr=1d50:6108, serial=0009060A02431111
  Serial Number: 0009060A02431111

[Clock Network Test]
->FX3 GPIF clock test
  Test results: 28905; 32661; 36417 - PASSED
->Si5351C test
  CLK0: 17554 / 17554 - PASSED
  CLK1: 17554 / 17554 - PASSED
  CLK2: 17554 / 17554 - PASSED
  CLK3: 17554 / 17554 - PASSED
  CLK4: 17554 / 17554 - PASSED
  CLK5: 17554 / 17554 - PASSED
  CLK6: 17554 / 17554 - PASSED
->ADF4002 Test
  Result: 10 - PASSED
->VCTCXO test
  Results : 5112908 (min); 5113048 (max) - PASSED
->Clock Network Test PASSED

[FPGA EEPROM Test]
->Read EEPROM
->Read data: 11 02 15 11 02 15 02
->FPGA EEPROM Test PASSED

[LMS7002M Test]
->Perform Registers Test
->External Reset line test
  Reg 0x20: Write value 0xFFFD, Read value 0xFFFD
  Reg 0x20: value after reset 0x0FFFF
->LMS7002M Test PASSED

[RF Loopback Test]
->Configure LMS
CGEN: Freq=80 MHz, VCO=2.4 GHz, INT=77, FRAC=131072, DIV_OUTCH_CGEN=14
CGEN: Freq=80 MHz, VCO=2.4 GHz, INT=77, FRAC=131072, DIV_OUTCH_CGEN=14
CGEN: Freq=491.52 MHz, VCO=1.96608 GHz, INT=63, FRAC=0, DIV_OUTCH_CGEN=1
CGEN: Freq=491.52 MHz, VCO=1.96608 GHz, INT=63, FRAC=0, DIV_OUTCH_CGEN=1
->Run Tests (TX_2-> LNA_L):
  CH0 (SXR=800.0MHz, SXT=805.0MHz): Result:(-13.7 dBFS, 5.00 MHz) - PASSED
  CH1 (SXR=800.0MHz, SXT=805.0MHz): Result:(-15.4 dBFS, 5.00 MHz) - PASSED
->Run Tests (TX_1 -> LNA_W):
  CH0 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-14.4 dBFS, 5.00 MHz) - PASSED
  CH1 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-21.3 dBFS, 5.00 MHz) - FAILED
->Run Tests (TX_2-> LNA_H):
  CH0 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-16.9 dBFS, 5.00 MHz) - PASSED
  CH1 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-13.8 dBFS, 5.00 MHz) - PASSED
->RF Loopback Test FAILED

=> Board tests FAILED <=

Elapsed time: 1.47 seconds

```

How do we proceed? I am quite devastated as I have never used the device because I was so scared of breaking it. Now I finally have a case for it and then this happens. I really hope we can resolve this issue.

---

<div class="post-metadata">

### Author: ![eokeeffe](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/eokeeffe/32/2379_2.png) [@eokeeffe](https://discourse.myriadrf.org/u/eokeeffe)
#### Post date: [6 March 2019 12:23 UTC](https://discourse.myriadrf.org/t/possible-hardware-fault-with-limesdr-usb/4234/2 "2019-03-06T12:23:47Z")

</div>

I’m getting a similar issue, TX2 LNA\_H. Device was just updated to latest firmware, was checking to make sure it works with software packages for my PhD.  
System is Ubuntu 16.04 LTS

[TESTING STARTED]  
-\>Start time: Wed Mar 6 12:16:42 2019

-\>Device: LimeSDR-USB, media=USB 3.0, module=FX3, addr=1d50:6108, serial=0009060B0049062A  
Serial Number: 0009060B0049062A

[Clock Network Test]  
-\>FX3 GPIF clock test  
Test results: 20137; 23893; 27649 - PASSED  
-\>Si5351C test  
CLK0: 17554 / 17554 - PASSED  
CLK1: 17554 / 17554 - PASSED  
CLK2: 17554 / 17554 - PASSED  
CLK3: 17554 / 17554 - PASSED  
CLK4: 17554 / 17554 - PASSED  
CLK5: 17554 / 17554 - PASSED  
CLK6: 17554 / 17554 - PASSED  
-\>ADF4002 Test  
Result: 10 - PASSED  
-\>VCTCXO test  
Results : 5112952 (min); 5113078 (max) - PASSED  
-\>Clock Network Test PASSED

[FPGA EEPROM Test]  
-\>Read EEPROM  
-\>Read data: 11 02 14 11 02 14 02  
-\>FPGA EEPROM Test PASSED

[LMS7002M Test]  
-\>Perform Registers Test  
-\>External Reset line test  
Reg 0x20: Write value 0xFFFD, Read value 0xFFFD  
Reg 0x20: value after reset 0x0FFFF  
-\>LMS7002M Test PASSED

[RF Loopback Test]  
-\>Configure LMS  
SetPllFrequency: timeout, busy bit is still 1  
-\>Run Tests (TX\_2-\> LNA\_L):  
CH0 (SXR=800.0MHz, SXT=805.0MHz): Result:(-14.6 dBFS, 5.00 MHz) - PASSED  
CH1 (SXR=800.0MHz, SXT=805.0MHz): Result:(-16.6 dBFS, 5.00 MHz) - PASSED  
-\>Run Tests (TX\_1 -\> LNA\_W):  
CH0 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-17.3 dBFS, 5.00 MHz) - PASSED  
CH1 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-18.0 dBFS, 5.00 MHz) - PASSED  
-\>Run Tests (TX\_2-\> LNA\_H):  
CH0 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-67.5 dBFS, -8.99 MHz) - FAILED  
CH1 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-63.9 dBFS, 8.12 MHz) - FAILED  
-\>RF Loopback Test FAILED

=\> Board tests FAILED \<=

Elapsed time: 4.45 seconds

######################################################

## LimeSuite information summary

######################################################

Version information:  
Library version: v18.10.0-g02cabfde  
Build timestamp: 2018-10-03  
Interface version: v2018.6.0  
Binary interface: 18.10-1

Supported connections:

- FT601
- FX3
- PCIEXillybus

---

<div class="post-metadata">

### Author: ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)
#### Post date: [7 March 2019 13:07 UTC](https://discourse.myriadrf.org/t/possible-hardware-fault-with-limesdr-usb/4234/3 "2019-03-07T13:07:30Z")

</div>

Hi @IamAComputer,

> [@IamAComputer](#):
>
> CH1 (SXR=1800.0MHz, SXT=1805.0MHz): Result:(-21.3 dBFS, 5.00 MHz) - FAILED

This is on the edge, but should still be OK.

Hi @eokeeffe,

> [@eokeeffe](#):
>
> -\>Run Tests (TX\_2-\> LNA\_H):  
> CH0 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-67.5 dBFS, -8.99 MHz) - FAILED  
> CH1 (SXR=2500.0MHz, SXT=2505.0MHz): Result:(-63.9 dBFS, 8.12 MHz) - FAILED

It looks like LNA\_H RF input is damaged.
