# Need help with a non-functioning LimeNET-Micro

**URL:** <https://discourse.myriadrf.org/t/need-help-with-a-non-functioning-limenet-micro/6281>\
**Category:** General Discussion\
**Created:** [8 July 2020 16:48 UTC](https://discourse.myriadrf.org/t/need-help-with-a-non-functioning-limenet-micro/6281 "2020-07-08T16:48:54Z")\
**Posts on this page:** 6\
**Page:** 1

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**Author:** ![brokenlimenetmicro](https://avatars.discourse-cdn.com/v4/letter/b/c57346/32.png) [@brokenlimenetmicro](https://discourse.myriadrf.org/u/brokenlimenetmicro)\
**Post date:** [8 July 2020 16:48 UTC](https://discourse.myriadrf.org/t/need-help-with-a-non-functioning-limenet-micro/6281/1 "2020-07-08T16:48:54Z")

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Hello RF Enthusiasts,

I received my LimeNET-Micro kit with the acrylic case (no antennas?) but something is wrong and the board does not seem to be functional. I was unable to follow any of the getting started instructions because there was no video output from the HDMI port. With the CM3 module in or out just nothing seems to be happening.

In the external USB mode with the CM3 module removed the device enumerates normally on windows/mac. LimeUtil --find sees it fine but when I try to update the firmware I get this:  
LimeUtil -update  
Connected to [LimeNET-Micro [USB 2] 583A0996ABA0  
TransferPacket: Write failed (ret=-1)  
Update not supported: UNKNOWN[HW=0]

I’m not sure what to do next so here I am.

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**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [9 July 2020 07:30 UTC](https://discourse.myriadrf.org/t/need-help-with-a-non-functioning-limenet-micro/6281/2 "2020-07-09T07:30:08Z")

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Hello @brokenlimenetmicro,

Could you make a photo of CM3 module, both sides, please.  
What exactly procedures yo are following?

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**Author:** ![brokenlimenetmicro](https://avatars.discourse-cdn.com/v4/letter/b/c57346/32.png) [@brokenlimenetmicro](https://discourse.myriadrf.org/u/brokenlimenetmicro)\
**Post date:** [10 July 2020 20:13 UTC](https://discourse.myriadrf.org/t/need-help-with-a-non-functioning-limenet-micro/6281/3 "2020-07-10T20:13:06Z")

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These are the getting started instructions I am following.

> **[Getting Started with the LimeNET-Micro - Myriad-RF Wiki](https://wiki.myriadrf.org/Getting_Started_with_the_LimeNET-Micro)**

Pictures requested:

 ![20200710_121601](https://canada1.discourse-cdn.com/flex034/uploads/myriadrf/original/2X/1/1d6deaa6cec41142e936f2c015c3e3c071ec5bef.jpeg)

 ![20200710_121542](https://canada1.discourse-cdn.com/flex034/uploads/myriadrf/original/2X/6/6c2fe5b48c2d19dc4c90fa7b3c5bfdce422fb72e.jpeg)

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<div class="post-metadata">

**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [13 July 2020 09:06 UTC](https://discourse.myriadrf.org/t/need-help-with-a-non-functioning-limenet-micro/6281/4 "2020-07-13T09:06:38Z")

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Hi,

You have to program eMMC memory of CM module first as described in section 1.2 in the link provided by you.  
How do you supply your board?  
Is LimeNET-Micro detected by rpiboot?

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<div class="post-metadata">

**Author:** ![brokenlimenetmicro](https://avatars.discourse-cdn.com/v4/letter/b/c57346/32.png) [@brokenlimenetmicro](https://discourse.myriadrf.org/u/brokenlimenetmicro)\
**Post date:** [13 July 2020 20:17 UTC](https://discourse.myriadrf.org/t/need-help-with-a-non-functioning-limenet-micro/6281/5 "2020-07-13T20:17:13Z")

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This is my first time working with a compute module. I was doing this wrong from the start. rpiboot worked and was able to put the raspian desktop image on it. It boots up now and I was able to install the limesuite tools.  
LimeUtil -update worked,  
[100%] 303104/303104 Bytes programming: completed (/usr/share/LimeSuite/images/20.01/LimeNET-Micro\_lms7\_trx\_HW\_2.1\_r1.3.rpd)  
Programming update complete!

however LimeQuickTest outputs the following:  
pi@raspberrypi:~ $ LimeQuickTest  
[TESTING STARTED]  
-\>Start time: Mon Jul 13 12:59:50 2020

[Clock Network Test]  
-\>REF clock test  
Test results: 65535; 65535; 65535 - FAILED  
-\>REF clock test FAILED  
-\>ADF4002 Test  
Result: 65535 - FAILED  
FAILED  
-\>VCTCXO test  
Results : 4294967295 (min); 4294967295 (max) - FAILED  
FAILED  
-\>Clock Network Test FAILED

[FPGA EEPROM Test]  
-\>Read EEPROM  
-\>Read data: 13 03 09 13 03 09 02  
-\>FPGA EEPROM Test PASSED

[LMS7002M Test]  
-\>Perform Registers Test  
RegistersTestInterval(startAddr=0x82, endAddr=0x82) - failed  
RegistersTestInterval(startAddr=0x82, endAddr=0x82) - failed  
RegistersTestInterval(startAddr=0x84, endAddr=0x84) - failed  
RegistersTestInterval(startAddr=0x84, endAddr=0x84) - failed  
RegistersTestInterval(startAddr=0x85, endAddr=0x85) - failed  
RegistersTestInterval(startAddr=0x85, endAddr=0x85) - failed  
RegistersTestInterval(startAddr=0x86, endAddr=0x8c) - failed  
RegistersTestInterval(startAddr=0x86, endAddr=0x8c) - failed  
RegistersTestInterval(startAddr=0xa8, endAddr=0xac) - failed  
RegistersTestInterval(startAddr=0xa8, endAddr=0xac) - failed  
RegistersTestInterval(startAddr=0xad, endAddr=0xae) - failed  
RegistersTestInterval(startAddr=0xad, endAddr=0xae) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x20, endAddr=0x2f) - failed  
RegistersTestInterval(startAddr=0x20, endAddr=0x2f) - failed  
RegistersTestInterval(startAddr=0x92, endAddr=0xa7) - failed  
RegistersTestInterval(startAddr=0x92, endAddr=0xa7) - failed  
RegistersTest() failed  
-\>LMS7002M Test FAILED

[RF Loopback Test]  
-\>Configure LMS  
TuneVCO(CGEN) - failed to lock (cmphl!=3)  
SetFrequencyCGEN(64 MHz) failed  
TuneVCO(CGEN) - failed to lock (cmphl!=3)  
SetFrequencyCGEN(256 MHz) failed  
Failed to set sample rate  
-\>RF Loopback Test FAILED

=\> Board tests FAILED \<=

Elapsed time: 2.12 seconds

pi@raspberrypi:~ $

I’m attempting to follow the instructions here:  
[https://wiki.myriadrf.org/Testing\_the\_LimeSDR](https://wiki.myriadrf.org/Testing_the_LimeSDR)

And it connects to the limenet-micro but on step 2.3.1 the SXT tab is all grayed out and disabled. I’m doing it directly on the compute module. I should try the limenet micro in external usb mode without the compute module and see if anything is different.

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<div class="post-metadata">

**Author:** ![brokenlimenetmicro](https://avatars.discourse-cdn.com/v4/letter/b/c57346/32.png) [@brokenlimenetmicro](https://discourse.myriadrf.org/u/brokenlimenetmicro)\
**Post date:** [13 July 2020 23:50 UTC](https://discourse.myriadrf.org/t/need-help-with-a-non-functioning-limenet-micro/6281/6 "2020-07-13T23:50:47Z")

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I forgot to reply that I’m powering the board with a 5v 2.8A wall wort.