Minor Modifications to the fpga gateware

Hi booth!

  1. If the purpose is demodulation, I suppose you’re going to decimate first, then serialize and finally send the signal to the GPIO. Is it correct?

  2. I would like to do the same, and put a FFT core inside the FPGA.
    According to the forum, it seems there not enough space in the FPGA to do it, but I didn’t try untill now.
    If you do it, please tell me!
    :wink:

About your questions:

  • “is decimation appropriate?” It depends. Which is the maximum frequency you want to monitor?
  • “do I need averaging?” It depends. Do you mean averaging of FFT results?

cheers