# Maximizing single channel RX bandwidth

**URL:** <https://discourse.myriadrf.org/t/maximizing-single-channel-rx-bandwidth/7884>\
**Category:** LimeSDR\
**Created:** [15 March 2023 09:12 UTC](https://discourse.myriadrf.org/t/maximizing-single-channel-rx-bandwidth/7884 "2023-03-15T09:12:14Z")\
**Posts on this page:** 4\
**Page:** 1

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**Author:** ![OrsonMaxwell](https://avatars.discourse-cdn.com/v4/letter/o/e47c2d/32.png) [@OrsonMaxwell](https://discourse.myriadrf.org/u/OrsonMaxwell)\
**Post date:** [15 March 2023 09:12 UTC](https://discourse.myriadrf.org/t/maximizing-single-channel-rx-bandwidth/7884/1 "2023-03-15T09:12:14Z")

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Hello!

Lately I’ve been primarily using LimeSDR USB for single channel RX only. I’ve read in [this post](https://discourse.myriadrf.org/t/max-bandwidth-of-dual-rx/307/7) by @Zack that the bandwidth bottleneck of the device is the FPGA-FX3 bus. I was wondering if it was theoretically possible to achieve higher RF bandwidth by truncating samples to 8bits in the FPGA. For example to 120MHz. Can you please advise if this is feasible? Thanks.

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**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [15 March 2023 11:39 UTC](https://discourse.myriadrf.org/t/maximizing-single-channel-rx-bandwidth/7884/2 "2023-03-15T11:39:51Z")

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Hi @OrsonMaxwell,

Let us calculate:

1. 1x RX, 8 bit per sample: this setup will generate 240 MB/s data stream. No problem for Limesdr USB but it will require custom FPGA gateware.
2. 1x RX, 12 bit per sample: this setup will generate 360 MB/s data stream. Even this shouldn’t be a problem for LimeSDR USB when using 12 bit compressed data stream. No need to modify FPGA gateware in this case.

Hope this helps.

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<div class="post-metadata">

**Author:** ![OrsonMaxwell](https://avatars.discourse-cdn.com/v4/letter/o/e47c2d/32.png) [@OrsonMaxwell](https://discourse.myriadrf.org/u/OrsonMaxwell)\
**Post date:** [15 March 2023 12:12 UTC](https://discourse.myriadrf.org/t/maximizing-single-channel-rx-bandwidth/7884/3 "2023-03-15T12:12:24Z")

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Hello! Thanks for your quick response! Item 2 is interesting - do I need anything special in order to set the ADC to 120MSPS?

P.S. I do have very adequate cooling in case this can prove important in higher clock rates.

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<div class="post-metadata">

**Author:** ![OrsonMaxwell](https://avatars.discourse-cdn.com/v4/letter/o/e47c2d/32.png) [@OrsonMaxwell](https://discourse.myriadrf.org/u/OrsonMaxwell)\
**Post date:** [15 March 2023 23:08 UTC](https://discourse.myriadrf.org/t/maximizing-single-channel-rx-bandwidth/7884/4 "2023-03-15T23:08:32Z")

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Ok a quick try with SoapySDR API gets me to 68MHz max then I start getting warning from the LMS driver like

```auto
[WARNING] SetPllFrequency: error configuring phase
[ERROR] LML TX phase search FAIL

```

Which makes me think that I’m doing something wrong with the TX channel. Currenly I’m doing absolutely nothing with it - I’m configuring RX only.