# LimeSDRMini decimation from 80M to 40M

**URL:** <https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700>\
**Category:** LimeSDR\
**Created:** [24 April 2018 16:20 UTC](https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700 "2018-04-24T16:20:19Z")\
**Posts on this page:** 10\
**Page:** 1

<div class="post-metadata">

**Author:** ![gasparka](https://avatars.discourse-cdn.com/v4/letter/g/a3d4f5/32.png) [@gasparka](https://discourse.myriadrf.org/u/gasparka)\
**Post date:** [24 April 2018 16:20 UTC](https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700/1 "2018-04-24T16:20:19Z")

</div>

Test using 40M sample rate, looks good:

 ![Screenshot from 2018-04-24 18-44-10](https://yyz2.discourse-cdn.com/flex034/uploads/myriadrf/original/2X/5/5fccc106bac1085ce4838282eb9c614864be4959.jpg)

Next, try to apply decimation for improved filtering, setting 2x decimation along with 80M sampling rate goes bad:

 ![Screenshot from 2018-04-24 18-44-54](https://yyz2.discourse-cdn.com/flex034/uploads/myriadrf/original/2X/2/29b6f81f68637763941984eb7525eb58218dcace.jpg)

I would expect this to work because sampling rate out of LMS7 is still 40M.  
@andrewback Is this something that could be fixed?

* * *

LimeSuite Build date: 2018-04-24  
Gateware: 1.24  
Gqrx setup: driver=lime,soapy=0

---

<div class="post-metadata">

**Author:** ![N0YKG](https://avatars.discourse-cdn.com/v4/letter/n/3bc359/32.png) [@N0YKG](https://discourse.myriadrf.org/u/N0YKG)\
**Post date:** [25 April 2018 11:23 UTC](https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700/2 "2018-04-25T11:23:49Z")

</div>

That looks to me like the decimation stage is saturating at some point. If you reduce the signal level, does it clean up?

---

<div class="post-metadata">

**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [25 April 2018 11:27 UTC](https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700/3 "2018-04-25T11:27:46Z")

</div>

Hi @gasparka,

Looks like bad settings. Could you save register ini file with LimeSuiteGUI and share it.

---

<div class="post-metadata">

**Author:** ![gasparka](https://avatars.discourse-cdn.com/v4/letter/g/a3d4f5/32.png) [@gasparka](https://discourse.myriadrf.org/u/gasparka)\
**Post date:** [25 April 2018 12:09 UTC](https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700/4 "2018-04-25T12:09:59Z")

</div>

@N0YKG gain has no effect, there is some frequency dependency of the test tone

@Zack trying to read the registers with ‘Chip–\>GUI’ has no effect, even though i am connected:

```auto
[14:51:03] INFO: Connected Control port: LimeSDR-Mini FW:5 HW:0 Protocol:1 GW:1.24 Ref Clk: 40.00 MHz

```

I tested the device with 80M sample rate and no decimation:

 ![Screenshot from 2018-04-25 14-56-35](https://yyz2.discourse-cdn.com/flex034/uploads/myriadrf/original/2X/3/3905bcd63b9ca40d7546f93fa2a7b38678a0dfb8.jpg)  
Looks a bit wide + about 10db loss, compared to the 40M sampling.

Wondering what is the maximum clock frequency that LimeSDRMini can provide to LMS7? The base clock (40M?) can be tuned by the DAC, but how much is unclear.

---

<div class="post-metadata">

**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [25 April 2018 12:15 UTC](https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700/5 "2018-04-25T12:15:17Z")

</div>

> [@gasparka](#):
>
> trying to read the registers with ‘Chip–\>GUI’

You have to push “Save” button after that.

---

<div class="post-metadata">

**Author:** ![gasparka](https://avatars.discourse-cdn.com/v4/letter/g/a3d4f5/32.png) [@gasparka](https://discourse.myriadrf.org/u/gasparka)\
**Post date:** [25 April 2018 12:24 UTC](https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700/6 "2018-04-25T12:24:27Z")

</div>

What i meant is that presing `Chip-GUI` does not update the values in the GUI, i assumed saving the default values would not be that useful.

Anyhow i have now done it (Connect, Chip-\>GUI, Save):

> <https://gist.github.com/gasparka/4e969e0cd7ffa5f91610af13b6c64162>

---

<div class="post-metadata">

**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [25 April 2018 12:34 UTC](https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700/7 "2018-04-25T12:34:32Z")

</div>

Hi @gasparka,

As far as I see from the register file, the decimation is bypass instead of 2:

 ![image](https://yyz2.discourse-cdn.com/flex034/uploads/myriadrf/original/2X/6/67af0b6300cc816db9527162d020efe1651b3b8e.png)

---

<div class="post-metadata">

**Author:** ![gasparka](https://avatars.discourse-cdn.com/v4/letter/g/a3d4f5/32.png) [@gasparka](https://discourse.myriadrf.org/u/gasparka)\
**Post date:** [25 April 2018 12:55 UTC](https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700/8 "2018-04-25T12:55:26Z")

</div>

@Zack I set the decimation in gqrx, then exit and use LimeSuite. Is it possible to set the decimation via Soapy interface?

---

<div class="post-metadata">

**Author:** ![gasparka](https://avatars.discourse-cdn.com/v4/letter/g/a3d4f5/32.png) [@gasparka](https://discourse.myriadrf.org/u/gasparka)\
**Post date:** [26 April 2018 13:04 UTC](https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700/9 "2018-04-26T13:04:22Z")

</div>

I got it working with Soapy.  
Here is the PR:

> <https://github.com/myriadrf/LimeSuite/pull/185>

---

<div class="post-metadata">

**Author:** ![Evan](https://avatars.discourse-cdn.com/v4/letter/e/54ee81/32.png) [@Evan](https://discourse.myriadrf.org/u/Evan)\
**Post date:** [22 July 2024 23:34 UTC](https://discourse.myriadrf.org/t/limesdrmini-decimation-from-80m-to-40m/2700/10 "2024-07-22T23:34:35Z")

</div>

To properly have the LMS7002M decimate using HBD\_OVR\_RXTSP, you must also reduce MCLK to prevent the FPGA from oversampling the output. You will need to modify register 0x002B to enable the divider (0x002B[0]=1) and then load the correct MCLK frequency in register 0x002C by updating RXTSPCLKA\_DIV[7:0] appropriately.
