# LimeSDR XTRX PCIe Adapter Board

**URL:** <https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222>\
**Category:** LimeSDR\
**Created:** [1 March 2023 13:38 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222 "2023-03-01T13:38:46Z")\
**Posts on this page:** 20\
**Page:** 1

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**Author:** ![mzs](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/mzs/32/2678_2.png) [@mzs](https://discourse.myriadrf.org/u/mzs)\
**Post date:** [1 March 2023 13:38 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/1 "2023-03-01T13:38:46Z")

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Will the “PCIe x2 + Front End Adapter” also be available ?

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [1 March 2023 13:42 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/2 "2023-03-01T13:42:34Z")

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> [@mzs](#):
>
> Will the “PCIe x2 + Front End Adapter” also be available ?

Not initially, but I’m sure it could be if there is sufficient demand.

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**Author:** ![markpaz](https://avatars.discourse-cdn.com/v4/letter/m/e19b73/32.png) [@markpaz](https://discourse.myriadrf.org/u/markpaz)\
**Post date:** [26 February 2024 23:04 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/3 "2024-02-26T23:04:29Z")

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> [@andrewback](#):
>
> Not initially, but I’m sure it could be if there is sufficient demand.

Do you have any plans for production?  
If my understanding is correct, the XTRX used reserved pins as PCIe lanes (PCI\_RX1 / PCI\_TX1).  
So, the XTRX with normal PCIe x1 to mPCIe convert card can’t achieve 120 MSPS SISO / 90 MSPS MIMO.  
[https://limesdr-xtrx.myriadrf.org/documentation/board-description#mini-pcie-edge-connector](https://limesdr-xtrx.myriadrf.org/documentation/board-description#mini-pcie-edge-connector)

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**Author:** ![ChrisLM](https://avatars.discourse-cdn.com/v4/letter/c/958977/32.png) [@ChrisLM](https://discourse.myriadrf.org/u/ChrisLM)\
**Post date:** [27 February 2024 06:45 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/4 "2024-02-27T06:45:02Z")

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@andrewback : +1 for a “PCIe x2 + Front End Adapter” for us also. If we could get back at least what the former LimeSDR USB was able to do, my company could switch back to LimeMicro product. Actual LimeXTRX, how interesting it may be on paper, lacks mPCIE support in many PC motherboards

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [27 February 2024 09:55 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/5 "2024-02-27T09:55:09Z")

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We are looking into this and hope to have some news soon.

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [28 February 2024 15:40 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/6 "2024-02-28T15:40:08Z")

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Moved posts on this to a new topic as it was at risk of getting lost in amongst other unrelated posts.

By way of a brief update: we should be testing the first boards in the coming weeks.

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [18 March 2024 17:25 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/7 "2024-03-18T17:25:14Z")

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Earlier today I pinged across an e-mail to those on who commented with interest in the PCIe adapter board. Should this still be of interest if you could get back to me ASAP, as I may be able to get a prototype board to you.

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**Author:** ![masefi](https://avatars.discourse-cdn.com/v4/letter/m/c67d28/32.png) [@masefi](https://discourse.myriadrf.org/u/masefi)\
**Post date:** [2 June 2024 14:12 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/8 "2024-06-02T14:12:36Z")

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I recently purchased the xtrx board and have the same issue and was wondering if I can still order this adapter? where can I find it?  
thanks

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [2 June 2024 18:23 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/9 "2024-06-02T18:23:59Z")

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There should be an announcement go out within the next couple of weeks, at which point ordering will open up. We’re just in the process of confirming a few final details.

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**Author:** ![sergey](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/sergey/32/4871_2.png) [@sergey](https://discourse.myriadrf.org/u/sergey)\
**Post date:** [16 June 2024 17:44 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/10 "2024-06-16T17:44:28Z")

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Hi Andrew,  
Sorry for possibly stupid question, but is it this adapter which you’ve been referring to [LimeNET Micro 2.0 Developer Edition | Crowd Supply](https://www.crowdsupply.com/lime-micro/limenet-micro-2) or is there something else being in development?

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [16 June 2024 17:51 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/11 "2024-06-16T17:51:31Z")

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No, it’s a regular PCIe x4 board with a mPCIe socket. which routes both lanes of PCIe from the LimeSDR XTRX. It also features a header connected to pogo pins for easier FPGA JTAG access.

There will be two versions of this board on sale: one with just the aforementioned features, and another build which also has an integrated 2x2 RF front-end (LNAs, drivers and TDD switching) with very similar specs to that on the LimePSB RPCM board used in LimeNET Micro 2.0 DE kit.

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**Author:** ![aardric](https://avatars.discourse-cdn.com/v4/letter/a/cdc98d/32.png) [@aardric](https://discourse.myriadrf.org/u/aardric)\
**Post date:** [21 June 2024 16:58 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/12 "2024-06-21T16:58:56Z")

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Are mechanical dimensions readily available for the XTRX mounted on a this adaptor board? I am considering stuffing this into a customised laptop. Do you think that cooling will be a challenge in this case?

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [21 June 2024 17:47 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/13 "2024-06-21T17:47:33Z")

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> [@aardric](#):
>
> Are mechanical dimensions readily available for the XTRX mounted on a this adaptor board?

We should have the PCIe adapter board outline dimensions, but I’m not sure about the combined height with the LimeSDR XTRX fitted, which will increase again when U.FL cables are connected. @Zack may have the board outline size.

> [@aardric](#):
>
> I am considering stuffing this into a customised laptop. Do you think that cooling will be a challenge in this case?

You can fit a full size PCIe card in this laptop? In any case, the XTRX will get warm, as will the RF amplifier devices on the adapter board if you get the version which has these populated. We’re not talking a huge amount of power dissipation by any means, but it’s impossible to say whether this will be an issue in your case and I would assumed that you’ll need at least some small amount of airflow across the boards.

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**Author:** ![aardric](https://avatars.discourse-cdn.com/v4/letter/a/cdc98d/32.png) [@aardric](https://discourse.myriadrf.org/u/aardric)\
**Post date:** [21 June 2024 18:00 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/14 "2024-06-21T18:00:52Z")

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Thanks. This was useful as it pushed me over the tipping point in going for a mini-pc dedicated to the XTRX support providing Ethernet connectivity and storage; a flexible compromise between portability and reliability.

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [21 June 2024 18:08 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/15 "2024-06-21T18:08:30Z")

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Well, I mean a LimeSDR XTRX by itself may be fine in a laptop with mPCIe, but it’s hard to say for certain. There are all sorts of factors, like airflow or lack off and potential for there being hot components nearby, plus SDR throughput based on the target application. Most laptops will have a fan which pushes air through, but the thermal properties will of course vary.

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**Author:** ![masefi](https://avatars.discourse-cdn.com/v4/letter/m/c67d28/32.png) [@masefi](https://discourse.myriadrf.org/u/masefi)\
**Post date:** [27 June 2024 15:02 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/16 "2024-06-27T15:02:55Z")

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Hi Andrew,  
Is there any updates on the status of this adapter?

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**Author:** ![aardric](https://avatars.discourse-cdn.com/v4/letter/a/cdc98d/32.png) [@aardric](https://discourse.myriadrf.org/u/aardric)\
**Post date:** [18 July 2024 23:28 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/17 "2024-07-18T23:28:00Z")

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I’ve located an industrial mini-pc with fan and both mPCIe and a PCIe(x4) slot which I hope to order and assess as a platform before I receive an XTRX. I am a bit (although not greatly) concerned about the thickness of the XTRX mounted on the adaptor card. I hope that I can obtain this information prior to ordering this PC. In parallel, I am trying to get a photo or drawing of the PCIe slot from the PC manufacturer.

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**Author:** ![tszn](https://avatars.discourse-cdn.com/v4/letter/t/a4c791/32.png) [@tszn](https://discourse.myriadrf.org/u/tszn)\
**Post date:** [14 August 2024 14:08 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/18 "2024-08-14T14:08:16Z")

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Hey Andrew.

if this is still applicable can you please put me on the list of being interested as early adopter of this carrier board. I am particular interested in the exploitation of PPS out without soldering on the pins (R78) of my units.

Already half a year back we were in contact with your sales team via E-Mail on this topic, looking for suited carrier/development boards, considering the exploitation of reserved miiniPCIe pins by the XTRX.

Note also: While triple checking if its R76 (mPCIe Pin3) or R78 (mPCIe Pin 5),  
I got confused in the bard description Table 14, which reads wrong in the 2nd last row, rightmost col: “PPS output from FPGA **form X6 ND** mPCIe pin **3** ” but should read “PPS output from FPGA **to** mPCIe pin **5** ”, inline with Table 15, Figure 3, and v 1.2 schematic.

Thanks in any case.

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [15 August 2024 08:46 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/19 "2024-08-15T08:46:35Z")

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Will hopefully have an update soon.

> [@tszn](#):
>
> Note also: While triple checking if its R76 (mPCIe Pin3) or R78 (mPCIe Pin 5),  
> I got confused in the bard description Table 14, which reads wrong in the 2nd last row, rightmost col: “PPS output from FPGA **form X6 ND** mPCIe pin **3** ” but should read “PPS output from FPGA **to** mPCIe pin **5** ”, inline with Table 15, Figure 3, and v 1.2 schematic.

Tagging @VytautasB to clarify.

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**Author:** ![VytautasB](https://avatars.discourse-cdn.com/v4/letter/v/ccd318/32.png) [@VytautasB](https://discourse.myriadrf.org/u/VytautasB)\
**Post date:** [16 August 2024 06:48 UTC](https://discourse.myriadrf.org/t/limesdr-xtrx-pcie-adapter-board/8222/21 "2024-08-16T06:48:15Z")

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> Note also: While triple checking if its R76 (mPCIe Pin3) or R78 (mPCIe Pin 5),  
> I got confused in the bard description Table 14, which reads wrong in the 2nd last row, rightmost col: “PPS output from FPGA **form X6 ND** mPCIe pin **3** ” but should read “PPS output from FPGA **to** mPCIe pin **5** ”, inline with Table 15, Figure 3, and v 1.2 schematic.

PPS output from FPGA is connected to mPCIe Pin 5 trough R78 resistor. Thanks for spotting that, I will update Table 14 in board description.

Regards,  
Vytautas

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