I hope to generate bitstream .bin file for the FPGA to program it. I am using vivado and write some verilog codes. I tried use some versions of .xdc files searched on website like: digilent-xdc/Arty-A7-35-Master.xdc at master · Digilent/digilent-xdc · GitHub
And I tried to use AI tools to generate the .xdc file but I always fail and get errors like:
ERROR: [DRC BIVB-1] Bank IO standard Support: Bank 33 has incompatible IO(s) because: The LVCMOS33 I/O standard is not supported for banks of type High Performance. Move the following ports or change their properties:
in_data[1], in_data[2] and in_data[3]
INFO: [Vivado_Tcl 4-198] DRC finished with 1 Errors
INFO: [Vivado_Tcl 4-199] Please refer to the DRC report (report_drc) for more information.
ERROR: [Vivado_Tcl 4-23] Error(s) found during DRC. Placer not run.
48 Infos, 0 Warnings, 19 Critical Warnings and 2 Errors encountered.
place_design failed
ERROR: [Common 17-39] ‘place_design’ failed due to earlier errors.
Could you help me find a work .xdc file?
Hi @alvinmeng,
It looks like your question is more related to general Vivado tool usage rather than specifically to the LimeSDR XTRX board. I’d recommend going through Vivado tutorials or the getting started documentation to better understand the build flow.
To clarify, the .xdc file from your link is not related to the LimeSDR XTRX board. .xdc files contain physical I/O constraints, timing constraints, etc., and they are specific to a particular board or design. You cannot mix and match them between different FPGAs or boards.
A complete Vivado project, including build instructions and all necessary files for the LimeSDR XTRX board gateware, can be found here.
Hope this helps!
regards,
Vytautas
1 Like
Thanks a lot. I successfully compiled the vivado project.
Another question is, which files need to be modified to implement a basic functions like relay an input signal.
What the function it is of the vivado project you posted?
I’m glad you were able to compile the project!
Regarding your question, it really depends on the specific functionality you’re trying to implement.
I’d recommend going through the available documentation, project source files, and any relevant references to understand how the system is structured. If you have a more specific question about a particular part of the design, I’d be happy to help!
You can find gateware documentation in same repo: LimeSDR-XTRX_GW/doc at master · myriadrf/LimeSDR-XTRX_GW · GitHub
