# LimeSDR Mini

**URL:** <https://discourse.myriadrf.org/t/limesdr-mini/1702>\
**Category:** LimeSDR\
**Created:** [14 September 2017 07:30 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702 "2017-09-14T07:30:34Z")\
**Posts on this page:** 14\
**Page:** 2

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [21 September 2017 08:43 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/21 "2017-09-21T08:43:13Z")

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See:

> [@Matching Networks for the LimeSDR Mini](https://discourse.myriadrf.org/t/matching-networks-for-the-limesdr-mini/1711/11):
>
> Measurements will be taken and plots published once the final version boards are back from assembly, which I believe is a few weeks out from now. A number of changes have been made since the prototypes pictured, including to the matching networks, in addition to changing the RF connectors and of course layout etc.

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**Author:** ![freqmod](https://avatars.discourse-cdn.com/v4/letter/f/df705f/32.png) [@freqmod](https://discourse.myriadrf.org/u/freqmod)\
**Post date:** [22 September 2017 05:54 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/22 "2017-09-22T05:54:43Z")

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Does anybody know why this device is limited to half the bandwidth of the normal limesdr, is it the FPGA, or FTDI chip that is too weak? Would it be theoretically possible to have bigger bandwidth by reducing the dynamic range (or if signal processing is done on the FPGA)?

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**Author:** ![SimonG4ELI](https://avatars.discourse-cdn.com/v4/letter/s/71e660/32.png) [@SimonG4ELI](https://discourse.myriadrf.org/u/SimonG4ELI)\
**Post date:** [22 September 2017 09:10 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/23 "2017-09-22T09:10:24Z")

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My guess is FPGA. Shirley 30MHz is OK? Gives 24MHz usable bandwidth.

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [23 September 2017 15:49 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/24 "2017-09-23T15:49:18Z")

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It’s 1x1 instead of 2x2 MIMO.

To go to 2x2 would mean more RF connectors, a bigger board and power supply circuitry, additional RF matching etc. As noted a smaller FPGA and uses a simple FTDI device instead of FX3 for USB 3.0 interface too.

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**Author:** ![SimonG4ELI](https://avatars.discourse-cdn.com/v4/letter/s/71e660/32.png) [@SimonG4ELI](https://discourse.myriadrf.org/u/SimonG4ELI)\
**Post date:** [23 September 2017 16:16 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/25 "2017-09-23T16:16:01Z")

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> [@andrewback](#):
>
> It’s 1x1 instead of 2x2 MIMO.
> 
> To go to 2x2 would mean more RF connectors, a bigger board and power supply circuitry, additional RF matching etc. As noted a smaller FPGA and uses a simple FTDI device instead of FX3 for USB 3.0 interface too.

Andrew, bit early for questions but I assume that somehow I’ll be able to detect that I’m using the Mini and not the Full LimeSDR?

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**Author:** ![freqmod](https://avatars.discourse-cdn.com/v4/letter/f/df705f/32.png) [@freqmod](https://discourse.myriadrf.org/u/freqmod)\
**Post date:** [23 September 2017 16:47 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/26 "2017-09-23T16:47:15Z")

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I do understand, and I am not complaining, I am just a bit curious.

However I tried to ask about the bandwidth (56 MHz Vs 30mhz, not mimo i. e. the amount of independent radio channels/antennas).

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [23 September 2017 18:34 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/27 "2017-09-23T18:34:19Z")

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> [@SimonG4ELI](#):
>
> I assume that somehow I’ll be able to detect that I’m using the Mini and not the Full LimeSDR?

Looking at recent commits to Lime Suite it appears to use the device name of LimeSDR-mini, so I would assume so.

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**Author:** ![SimonG4ELI](https://avatars.discourse-cdn.com/v4/letter/s/71e660/32.png) [@SimonG4ELI](https://discourse.myriadrf.org/u/SimonG4ELI)\
**Post date:** [23 September 2017 18:40 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/28 "2017-09-23T18:40:31Z")

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> [@andrewback](#):
>
> > [@SimonG4ELI](#):
> >
> > I assume that somehow I’ll be able to detect that I’m using the Mini and not the Full LimeSDR?
> 
> Looking at recent commits to Lime Suite it appears to use the device name of LimeSDR-mini, so I would assume so.

Thanks

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [26 September 2017 16:47 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/29 "2017-09-26T16:47:06Z")

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The LimeSDR Mini board design and FPGA RTL sources have been published:

> **[Board Design and FPGA Gateware Published](https://www.crowdsupply.com/lime-micro/limesdr-mini/updates/board-design-and-fpga-gateware-published)**
>
> We have published the LimeSDR Mini PCB design database and FPGA gateware RTL sources.

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**Author:** ![caipiblack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/caipiblack/32/1886_2.png) [@caipiblack](https://discourse.myriadrf.org/u/caipiblack)\
**Post date:** [26 September 2017 18:42 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/30 "2017-09-26T18:42:03Z")

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Hi guy’s,

According to the schematics, the RX/TX in/out stage can be switched (depending on RX/TX frequency)

RX bands:

- RX1\_H: 2.0Ghz to 2.6Ghz
- RX1\_W: 700Mhz to 900Mhz

TX bands:

- TX1\_2: 30Mhz to 1.9Ghz
- TX1\_1: 2Ghz to 2.6Ghz

If I just read the schematics, the limesdr mini will not work for RX on 433Mhz, but as I know there is something similar with the limesdr: Should it work on 433 Mhz in RX AND TX like the limesdr **after some tweak**?

Thanks

 ![RX_TX](https://yyz2.discourse-cdn.com/flex034/uploads/myriadrf/original/2X/3/38894bff59032c8eaa04df23a0db2a63893af61e.png)

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**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [26 September 2017 19:20 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/31 "2017-09-26T19:20:40Z")

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Hi @caipiblack,

Sorry, there were notes left from old design in schematic. Stay tuned for measurements from first batch.

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**Author:** ![b.shubenok](https://avatars.discourse-cdn.com/v4/letter/b/aeb1de/32.png) [@b.shubenok](https://discourse.myriadrf.org/u/b.shubenok)\
**Post date:** [9 October 2017 09:20 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/32 "2017-10-09T09:20:11Z")

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Hi! Any updates on this?

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [9 October 2017 09:37 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/33 "2017-10-09T09:37:22Z")

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They have not been received yet. I _think_ we should have them some time next week.

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**Author:** ![b.shubenok](https://avatars.discourse-cdn.com/v4/letter/b/aeb1de/32.png) [@b.shubenok](https://discourse.myriadrf.org/u/b.shubenok)\
**Post date:** [9 October 2017 09:42 UTC](https://discourse.myriadrf.org/t/limesdr-mini/1702/34 "2017-10-09T09:42:50Z")

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Thank you for the quick response! Regardless there no actual measurements, what were the design goals for each RX input? As @Zack mentioned the notes on the schematic left from the previous design.

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