# LimeSDR mini on Ubuntu

**URL:** <https://discourse.myriadrf.org/t/limesdr-mini-on-ubuntu/8221>\
**Category:** LimeSDR\
**Created:** [28 February 2024 14:42 UTC](https://discourse.myriadrf.org/t/limesdr-mini-on-ubuntu/8221 "2024-02-28T14:42:18Z")\
**Posts on this page:** 9\
**Page:** 1

<div class="post-metadata">

**Author:** ![Luck97](https://avatars.discourse-cdn.com/v4/letter/l/4491bb/32.png) [@Luck97](https://discourse.myriadrf.org/u/Luck97)\
**Post date:** [28 February 2024 14:42 UTC](https://discourse.myriadrf.org/t/limesdr-mini-on-ubuntu/8221/1 "2024-02-28T14:42:18Z")

</div>

Hello!  
We are trying to run tests with a LimeSDR mini v1.3 on Ubuntu 20.04. We have installed everything, including the LimeSuite version and other related components, but when running LimeQuickTest we encounter issues. We are using version 20.01, but along with my colleagues, we have tried other versions with similar results. Could someone recommend the optimal version and check if there is anything strange based on the errors that LimeQuickTest throws?

Below is the output when running LimeQuickTest:

[TESTING STARTED]  
-\>Start time: Wed Feb 28 14:40:14 2024

-\>Device: LimeSDR Mini, media=USB 2.0, module=FT601, addr=24607:1027, serial=1DA153DE25554DF  
Warning: USB3 not available  
Serial Number: 1DA153DE25554DF

[Clock Network Test]  
-\>REF clock test  
Test results: 65535; 65535; 65535 - FAILED  
-\>REF clock test FAILED  
-\>VCTCXO test  
Results : 4294967295 (min); 4294967295 (max) - FAILED  
FAILED  
-\>Clock Network Test FAILED

[FPGA EEPROM Test]  
-\>Read EEPROM  
-\>Read data: FF FF FF FF FF FF FF  
-\>FPGA EEPROM Test FAILED

[LMS7002M Test]  
-\>Perform Registers Test  
RegistersTestInterval(startAddr=0x82, endAddr=0x82) - failed  
RegistersTestInterval(startAddr=0x82, endAddr=0x82) - failed  
RegistersTestInterval(startAddr=0x84, endAddr=0x84) - failed  
RegistersTestInterval(startAddr=0x84, endAddr=0x84) - failed  
RegistersTestInterval(startAddr=0x85, endAddr=0x85) - failed  
RegistersTestInterval(startAddr=0x85, endAddr=0x85) - failed  
RegistersTestInterval(startAddr=0x86, endAddr=0x8c) - failed  
RegistersTestInterval(startAddr=0x86, endAddr=0x8c) - failed  
RegistersTestInterval(startAddr=0xa8, endAddr=0xac) - failed  
RegistersTestInterval(startAddr=0xa8, endAddr=0xac) - failed  
RegistersTestInterval(startAddr=0xad, endAddr=0xae) - failed  
RegistersTestInterval(startAddr=0xad, endAddr=0xae) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x20, endAddr=0x2f) - failed  
RegistersTestInterval(startAddr=0x20, endAddr=0x2f) - failed  
RegistersTestInterval(startAddr=0x92, endAddr=0xa7) - failed  
RegistersTestInterval(startAddr=0x92, endAddr=0xa7) - failed  
RegistersTest() failed  
-\>LMS7002M Test FAILED

[RF Loopback Test]  
-\>Configure LMS  
TuneVCO(CGEN) - failed to lock (cmphl!=3)  
SetFrequencyCGEN(61.44 MHz) failed  
TuneVCO(CGEN) - failed to lock (cmphl!=3)  
SetFrequencyCGEN(122.88 MHz) failed  
Failed to set sample rate  
-\>RF Loopback Test FAILED

=\> Board tests FAILED \<=

Elapsed time: 1.60 seconds

---

<div class="post-metadata">

**Author:** ![VytautasB](https://avatars.discourse-cdn.com/v4/letter/v/ccd318/32.png) [@VytautasB](https://discourse.myriadrf.org/u/VytautasB)\
**Post date:** [28 February 2024 14:54 UTC](https://discourse.myriadrf.org/t/limesdr-mini-on-ubuntu/8221/2 "2024-02-28T14:54:55Z")

</div>

Hi @Luck97,

first thing I see in your log is “media=USB 2.0” and “Warning: USB3 not available”. Have you connected your board to USB3.0 port?

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<div class="post-metadata">

**Author:** ![Luck97](https://avatars.discourse-cdn.com/v4/letter/l/4491bb/32.png) [@Luck97](https://discourse.myriadrf.org/u/Luck97)\
**Post date:** [28 February 2024 15:02 UTC](https://discourse.myriadrf.org/t/limesdr-mini-on-ubuntu/8221/3 "2024-02-28T15:02:17Z")

</div>

Not yet, the device to which the LimeSDR is connected does not have USB 3.0. We are in the process of finding a replacement device that does have USB 3.0.  
Do you think that could be the root of the entire problem?

---

<div class="post-metadata">

**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [28 February 2024 15:46 UTC](https://discourse.myriadrf.org/t/limesdr-mini-on-ubuntu/8221/4 "2024-02-28T15:46:23Z")

</div>

> [@Luck97](#):
>
> Do you think that could be the root of the entire problem?

While it should mostly be possible to use a LimeSDR Mini with USB 2.0, it’s pretty borderline due to the much lower power available. To validate the hardware with LimeQuickTest you should be plugged directly — hence avoiding potential cable issues — into a USB 3.0 port.

---

<div class="post-metadata">

**Author:** ![Luck97](https://avatars.discourse-cdn.com/v4/letter/l/4491bb/32.png) [@Luck97](https://discourse.myriadrf.org/u/Luck97)\
**Post date:** [28 February 2024 17:54 UTC](https://discourse.myriadrf.org/t/limesdr-mini-on-ubuntu/8221/5 "2024-02-28T17:54:34Z")

</div>

Thank you for the advice. We connected it via USB3 and it still throws the same errors. Below are the logs from one of these tests with version 20.10.

Any advice?

PS C:\WINDOWS\system32\> LimeQuickTest  
[TESTING STARTED]  
-\>Start time: Wed Feb 28 17:12:50 2024  
-\>LimeSuite version: 20.10.0-PothosSDR-2021.07.25-vc16-x64

-\>Device: LimeSDR Mini, media=USB 3, module=FT601, serial=1DA153DE25554DF, index=0, HW=127, GW=65535.65535  
Serial Number: 1DA153DE25554DF  
Chip temperature: 45 C

[Clock Network Test]  
-\>REF clock test  
Test results: 65535; 65535; 65535 - FAILED  
-\>REF clock test FAILED  
-\>VCTCXO test  
Results : 4294967295 (min); 4294967295 (max) - FAILED  
FAILED  
-\>Clock Network Test FAILED

[FPGA EEPROM Test]  
-\>Read EEPROM  
-\>Read data: FF FF FF FF FF FF FF  
-\>FPGA EEPROM Test FAILED

[LMS7002M Test]  
-\>Perform Registers Test  
RegistersTestInterval(startAddr=0x82, endAddr=0x82) - failed  
RegistersTestInterval(startAddr=0x82, endAddr=0x82) - failed  
RegistersTestInterval(startAddr=0x84, endAddr=0x84) - failed  
RegistersTestInterval(startAddr=0x84, endAddr=0x84) - failed  
RegistersTestInterval(startAddr=0x85, endAddr=0x85) - failed  
RegistersTestInterval(startAddr=0x85, endAddr=0x85) - failed  
RegistersTestInterval(startAddr=0x86, endAddr=0x8c) - failed  
RegistersTestInterval(startAddr=0x86, endAddr=0x8c) - failed  
RegistersTestInterval(startAddr=0xa8, endAddr=0xac) - failed  
RegistersTestInterval(startAddr=0xa8, endAddr=0xac) - failed  
RegistersTestInterval(startAddr=0xad, endAddr=0xae) - failed  
RegistersTestInterval(startAddr=0xad, endAddr=0xae) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x100, endAddr=0x104) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x105, endAddr=0x10b) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x10c, endAddr=0x114) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x115, endAddr=0x11a) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x11c, endAddr=0x124) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x200, endAddr=0x20c) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x240, endAddr=0x261) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x280, endAddr=0x2a7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x2c0, endAddr=0x2e7) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x300, endAddr=0x327) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x340, endAddr=0x367) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x380, endAddr=0x3a7) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x400, endAddr=0x40f) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x440, endAddr=0x461) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x480, endAddr=0x4a7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x4c0, endAddr=0x4e7) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x500, endAddr=0x527) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x540, endAddr=0x567) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x580, endAddr=0x5a7) - failed  
RegistersTestInterval(startAddr=0x20, endAddr=0x2f) - failed  
RegistersTestInterval(startAddr=0x20, endAddr=0x2f) - failed  
RegistersTestInterval(startAddr=0x92, endAddr=0xa7) - failed  
RegistersTestInterval(startAddr=0x92, endAddr=0xa7) - failed  
RegistersTest() failed  
-\>LMS7002M Test FAILED

[RF Loopback Test]  
-\>Configure LMS  
TuneVCO(CGEN) - failed to lock (cmphl!=3)  
SetFrequencyCGEN(61.44 MHz) failed  
TuneVCO(CGEN) - failed to lock (cmphl!=3)  
SetFrequencyCGEN(122.88 MHz) failed  
Failed to set sample rate  
-\>RF Loopback Test FAILED

=\> Board tests FAILED \<=

Elapsed time: 2.30 seconds

---

<div class="post-metadata">

**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [28 February 2024 19:17 UTC](https://discourse.myriadrf.org/t/limesdr-mini-on-ubuntu/8221/6 "2024-02-28T19:17:25Z")

</div>

Tagging @Zack for comment.

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<div class="post-metadata">

**Author:** ![VytautasB](https://avatars.discourse-cdn.com/v4/letter/v/ccd318/32.png) [@VytautasB](https://discourse.myriadrf.org/u/VytautasB)\
**Post date:** [29 February 2024 07:33 UTC](https://discourse.myriadrf.org/t/limesdr-mini-on-ubuntu/8221/7 "2024-02-29T07:33:35Z")

</div>

Looks like FT601 USB IC cannot communicate with FPGA. So it could be hardware problems or FT601 configuration issues or FPGA is not programmed.

Do you see any LED activity when you plug in your LimeSDR-Mini?  
There is [thread](https://discourse.myriadrf.org/t/limesdr-mini-fails-quick-test/8206/3) with similar problem as yours. Can you check FT601 USB IC configuration as described in that thread?

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<div class="post-metadata">

**Author:** ![Luck97](https://avatars.discourse-cdn.com/v4/letter/l/4491bb/32.png) [@Luck97](https://discourse.myriadrf.org/u/Luck97)\
**Post date:** [29 February 2024 14:20 UTC](https://discourse.myriadrf.org/t/limesdr-mini-on-ubuntu/8221/8 "2024-02-29T14:20:28Z")

</div>

I don’t have the SDR board with me, it’s with a colleague. But we checked and did the test together, and he told me:  
Regarding the LED activity, when connected to the PC with USB 3, the red-yellow lights intermittently turned on.  
We also did a “read” of the FT601 USB IC, I’ll attach the capture below:

 ![image](https://canada1.discourse-cdn.com/flex034/uploads/myriadrf/original/2X/e/e1e23a35deca6a6e9a422b11d40b8c69066ba060.png)

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<div class="post-metadata">

**Author:** ![VytautasB](https://avatars.discourse-cdn.com/v4/letter/v/ccd318/32.png) [@VytautasB](https://discourse.myriadrf.org/u/VytautasB)\
**Post date:** [1 March 2024 09:48 UTC](https://discourse.myriadrf.org/t/limesdr-mini-on-ubuntu/8221/9 "2024-03-01T09:48:16Z")

</div>

FT601 USB IC configuration looks OK.

When you plug in your board, you should observe that the dual-color RG LED1 (located in the middle) is blinking in green, while simultaneously emitting a solid red light. That means:

- FPGA is configured
- Blinking green color indicates that FPGA receives clock from FT601 USB IC
- Solid red color means that FPGA is not receiving clock from LMS7002 IC, which is expected behavior. This red light should turn off once the LMS7002 IC is configured through software at a later stage.

I am not sure if I correctly understood what you mean by saying:

> the red-yellow lights intermittently turned on.

@Luck97 , can you clarify how LED1 behaves when you plug-in your board? Do you see blinking green color or both red and green colors are turned on and stays solid?