LimeSDR Mini external clock reference config permanent?

#1

Hi,

I’m currently considering buying a limesdr mini but I want to know something about it’s external clock configuration. For my purposes I want to have a lower drift of the LO by connecting an external 10MHz square-wave reference. I read that the configuration change in the Limesuite GUI for the LimeSDR does not survive a reboot. ( https://destevez.net/2018/07/limesdr-external-reference-quick-howto/)
Is this also correct for the LimeSDR Mini although it uses a different clock setup without the phase detector. Do I need to change the external reference clock Frequency every time I plug in the SDR or just once and forget?

Regards
Joshua

#2

I think you’d need to do it every time, since the default is to use onboard clock, but should be possible via API and without having to use Lime Suite. @IgnasJ could advise.

#3

You need to set it every time. Software needs to know that clock for calculating dividers for RX/TX frequency and sample rate, So unless your reference clock is 40 MHz (same as LimeSDR-Mini on board) you need to set it.

#4

Just remember that to route the clock signal to the external clock connector on the Lime mini you need to rotate a SMD resistor. Also it will then fail the LimeTest routine if you run it because during the test of the clock circuitry the DAC driving the onboard VCTCXO is exercised. It makes no difference to the operation it just shocks you a bit if you run Lime test after doing the resistor mod.

Clive

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#5

Hi,
thank you for your answers!
Its a bummer that I’ll have to reset the LO frequency every time when not using 40 MHz.
Are there any efforts to change this behavior?

Regards
Joshua

#6

If I was heading off script, I would compile my own custom library/dll with support.
e.g. I’d add my custom reference frequency into FPGA::DetectRefClk https://github.com/myriadrf/LimeSuite/blob/master/src/FPGA_common/FPGA_common.cpp#L906

But I would also fully read and understand the lmk00105 datasheet, before attempting to modify any clock hardware on a mini.

#7

I think 10MHz clock may be often used as reference so I added it to FPGA::DetectRefClk().

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