# LimeSDR ext ref clock freq and type?

**URL:** <https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647>\
**Category:** LimeSDR\
**Created:** [25 January 2017 22:46 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647 "2017-01-25T22:46:05Z")\
**Posts on this page:** 18\
**Page:** 1

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**Author:** ![M0GLO](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/m0glo/32/999_2.png) [@M0GLO](https://discourse.myriadrf.org/u/M0GLO)\
**Post date:** [25 January 2017 22:46 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/1 "2017-01-25T22:46:05Z")

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Hi all,

I looked over the docs and didn’t see any specs on what will work as an external freq reference, can I use a GPSDO 10MHz signal as a PLL input and have it lock the way I do with my HPSDR rig? Does it need a sine or square wave signal (or does that even matter)? What signal level min and max?

Todd  
M0GLO

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**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [26 January 2017 07:42 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/2 "2017-01-26T07:42:37Z")

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Synchronization circuitry to external clock is based on [ADF4002](http://www.analog.com/media/en/technical-documentation/data-sheets/ADF4002.pdf).  
This is excerpt from datasheet:

> Reference Input. This is a CMOS input with a nominal threshold of VDD/2 and a dc equivalent input resistance of 100 kΩ. This input can be driven from a TTL or CMOS crystal oscillator or it can be ac-coupled.

In LimeSDR-USB case VDD is 3.3V.

Reference clock frequency according to the datasheet is 20MHz (min) and 300MHz (max). Although it states that for frequencies lower than 20MHz slew rate must be more than 50V/us.  
LimeSDR-USB is tested with 10MHz external clock.

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**Author:** ![bardia1990](https://avatars.discourse-cdn.com/v4/letter/b/91b2a8/32.png) [@bardia1990](https://discourse.myriadrf.org/u/bardia1990)\
**Post date:** [4 April 2017 12:21 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/3 "2017-04-04T12:21:03Z")

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Hi  
I want synchronize tow LimeSDR for Direction Finding (DF). but i dont know how do it .i am new with LimeSDR please help me.  
Thank you

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [4 April 2017 14:44 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/4 "2017-04-04T14:44:51Z")

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There are two U.FL connectors near the USB 3.0 connector that are marked REF CLK IN and OUT, that are used for synchronisation. You connect OUT from one board to IN on another board. Then if you start LimeSuiteGUI and select Modules -\> Si5351C you will see there are radio buttons to change PLL source to CLK IN.

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**Author:** ![N1JEZ](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/n1jez/32/288_2.png) [@N1JEZ](https://discourse.myriadrf.org/u/N1JEZ)\
**Post date:** [4 April 2017 22:05 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/5 "2017-04-04T22:05:29Z")

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That doesn’t seem to work, or at least I don’t see the LED that indicates a lock or not come on.

What I did was open Modules | ADF4002

On the upper right, Fref, MHz will have 10 in it. Then click on Calculate R, N & Upload.

At that point, the Lock LED will come on either Red for no 10 MHz or Green if you are feeding a valid 10 MHz to CLK IN.

The frequency seemed to lock spot on. I used a 10 MHz level of about -3 dBm or so as the ADF4002 spec said 0 to -10 dBm.

Is this wrong?? Seems to function.

Tnx,  
Mike

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**Author:** ![bardia1990](https://avatars.discourse-cdn.com/v4/letter/b/91b2a8/32.png) [@bardia1990](https://discourse.myriadrf.org/u/bardia1990)\
**Post date:** [5 April 2017 04:42 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/6 "2017-04-05T04:42:49Z")

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is it possible to synchronize more than two LimeSDR?  
if we can synchronize more than two LimeSDR then Do we need external clock to connect first REF CLK IN in SDR?

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**Author:** ![bardia1990](https://avatars.discourse-cdn.com/v4/letter/b/91b2a8/32.png) [@bardia1990](https://discourse.myriadrf.org/u/bardia1990)\
**Post date:** [5 April 2017 04:50 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/7 "2017-04-05T04:50:44Z")

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There is one ( reference clock input) U.FL connectors near the USB 3.0 connector.but i dont see REF CLK OUT

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [5 April 2017 07:08 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/9 "2017-04-05T07:08:19Z")

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What version is your board?

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**Author:** ![bardia1990](https://avatars.discourse-cdn.com/v4/letter/b/91b2a8/32.png) [@bardia1990](https://discourse.myriadrf.org/u/bardia1990)\
**Post date:** [5 April 2017 08:19 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/10 "2017-04-05T08:19:01Z")

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version 1.2

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**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [5 April 2017 08:22 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/11 "2017-04-05T08:22:41Z")

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We just tested 2 scenarios for 1v4 board, both were working OK. This will work on 1v4 boards only.

1. LimeSDR-USB#1 synchronizes LimeSDR-USB#2:  
a) REF\_CLK Out of LimeSDR-USB#1 is connected to REF\_CLK In of LimeSDR-USB#2;  
b) TCXO of LimeSDR-USB#1 is tuned by DAC;  
c) TCXO of LimeSDR-USB#2 is tuned by ADF, reference frequency is 30.72MHz.

2. LimeSDR-USB#1 is synchronized by external 10MHz clock source; LimeSDR-USB#1 synchronizes LimeSDR-USB#2:  
a) REF\_CLK Out of LimeSDR-USB#1 is connected to REF\_CLK In of LimeSDR-USB#2;  
b) REF\_CLK In of LimeSDR-USB#1 is connected to external 10MHz clock source;  
c) TCXO of LimeSDR-USB#1 is tuned by ADF, reference frequency is 10MHz.  
d) TCXO of LimeSDR-USB#2 is tuned by ADF, reference frequency is 30.72MHz.

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**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [5 April 2017 08:25 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/12 "2017-04-05T08:25:41Z")

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Hello @bardia1990,

You can synchronize 1v2 board to the external reference clock only and there is no possibility to synchronize another board.

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**Author:** ![bardia1990](https://avatars.discourse-cdn.com/v4/letter/b/91b2a8/32.png) [@bardia1990](https://discourse.myriadrf.org/u/bardia1990)\
**Post date:** [5 April 2017 08:28 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/13 "2017-04-05T08:28:31Z")

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Thank a lot. 😊

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**Author:** ![bardia1990](https://avatars.discourse-cdn.com/v4/letter/b/91b2a8/32.png) [@bardia1990](https://discourse.myriadrf.org/u/bardia1990)\
**Post date:** [8 April 2017 09:16 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/14 "2017-04-08T09:16:15Z")

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Hi andrewback, excuse-me for irrelevant question . how to set osmocom source device argument (driver=lime,soapy=0) in gnuradio to use two receive channel independently(by USB interface) ? or how to set this argument to use two LimeSDR(hardware) to use four receive channel independently?(for MIMO or phase array)  
Thanks lot

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**Author:** ![andrewback](https://avatars.discourse-cdn.com/v4/letter/a/22d042/32.png) [@andrewback](https://discourse.myriadrf.org/u/andrewback)\
**Post date:** [9 April 2017 17:21 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/15 "2017-04-09T17:21:28Z")

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Not sure about this. One for @joshblum perhaps.

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**Author:** ![martywittrock](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/martywittrock/32/66_2.png) [@martywittrock](https://discourse.myriadrf.org/u/martywittrock)\
**Post date:** [6 July 2017 17:47 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/16 "2017-07-06T17:47:08Z")

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Andrew,

I’d also like to know how to set up the Lime in Pothos for the same reason (device argument) if Josh replies back on this.

73 de Marty, KN0CK

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**Author:** ![DUO](https://avatars.discourse-cdn.com/v4/letter/d/90db22/32.png) [@DUO](https://discourse.myriadrf.org/u/DUO)\
**Post date:** [26 February 2019 11:48 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/17 "2019-02-26T11:48:26Z")

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Hello Zack and Andrew,  
back to first question:  
what is the wave signal need for ref clock to use osmocom stacks as example osmo-trx.  
I have sine wave 10mhz ref clock which is seem not stable, maybe it need square wave? or maybe limesdr firmware problem and need add more code to get the sinewave will do 100% working?

please advise! Thanks

Sandi / DUO

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**Author:** ![M0GLO](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/m0glo/32/999_2.png) [@M0GLO](https://discourse.myriadrf.org/u/M0GLO)\
**Post date:** [26 February 2019 15:34 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/18 "2019-02-26T15:34:42Z")

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I should probably update this as I have indeed been able to use a telecoms surplus Trimble Thunderbolt GPSDO (about $165 on eBay, a bargain for the accuracy) with great success!  
Being on frequency is what I call a key feature of the SDR design but it takes a stable, locked master oscillator to realize it.

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**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [27 February 2019 17:14 UTC](https://discourse.myriadrf.org/t/limesdr-ext-ref-clock-freq-and-type/647/19 "2019-02-27T17:14:00Z")

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Yes, you will get the best performance of square wave. But it will work with sine as well. Just make sure you provide 0 - 2.5V.