# Dual XTRX Deterministic Coherent Operation

**URL:** <https://discourse.myriadrf.org/t/dual-xtrx-deterministic-coherent-operation/13063>\
**Category:** General Discussion\
**Created:** [3 March 2026 11:52 UTC](https://discourse.myriadrf.org/t/dual-xtrx-deterministic-coherent-operation/13063 "2026-03-03T11:52:59Z")\
**Posts on this page:** 1\
**Showing post:** 6

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**Author:** ![spet](https://avatars.discourse-cdn.com/v4/letter/s/b9bd4f/32.png) [@spet](https://discourse.myriadrf.org/u/spet)\
**Post date:** [12 April 2026 04:24 UTC](https://discourse.myriadrf.org/t/dual-xtrx-deterministic-coherent-operation/13063/6 "2026-04-12T04:24:33Z")

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> [@chaloz](#):
>
> I’ve tried to run two LimeSDR XTRXs coherently using GPSDO with two phase aligned outputs: one for clock with 26MHz and one for 1PPS. So I feed these to two XTRXs (through U.FL connectors) and they are pretty much phase aligned on the RX side (I’ve only tested RX), BUT they have initial random phase offset of several samples (my sampling frequency is 12MHz). This seem to change every time the RX stream is started. I’m assuming this has to do with clock domain crossings, but I would have thought that the phase error would be ±1 sample, yet it seems more than that in my case.

i believe you should get constant phase offset across multiple xtrxs, but that phase offset would be random from startup to startup and LO change. both xtrxs are fed a common clock, but that clock runs an independent fractional-n pll on each xtrx and thus causes a different phase from startup-to-startup and LO change, from my understanding

 ![Screenshot 2026-04-11 at 9.26.22 PM](https://canada1.discourse-cdn.com/flex034/uploads/myriadrf/original/2X/8/81885d591f754807f44189d28d3e01c88ecee39f.png)

do you have plots of the phase between channels like in this post [Expected phase error when synchronizing multiple xtrxs [phase coherent processing]](https://discourse.myriadrf.org/t/expected-phase-error-when-synchronizing-multiple-xtrxs-phase-coherent-processing/13101) ?

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