# Could you pls help me to check the connection of unused volatage pins?

**URL:** <https://discourse.myriadrf.org/t/could-you-pls-help-me-to-check-the-connection-of-unused-volatage-pins/4052>\
**Category:** System Development\
**Created:** [22 January 2019 06:42 UTC](https://discourse.myriadrf.org/t/could-you-pls-help-me-to-check-the-connection-of-unused-volatage-pins/4052 "2019-01-22T06:42:56Z")\
**Posts on this page:** 3\
**Page:** 1

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**Author:** ![huangdeyong123](https://avatars.discourse-cdn.com/v4/letter/h/ec9cab/32.png) [@huangdeyong123](https://discourse.myriadrf.org/u/huangdeyong123)\
**Post date:** [22 January 2019 06:42 UTC](https://discourse.myriadrf.org/t/could-you-pls-help-me-to-check-the-connection-of-unused-volatage-pins/4052/1 "2019-01-22T06:42:56Z")

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Hello , alll,  
Nowadays, i supply the sole 1.8V for the LMS7002M, of course , I used the inner LDO, I met a issue that I could not visit the SPI interface from FPGA, I have set the LMS\_core\_LDO\_en=1,LMS\_txen=0 and LMS\_rxen=0.  
we doubted the connection of the unused power pins, we connected the unused the power pins like the screemshot.

 ![7002_power_connection](https://canada1.discourse-cdn.com/flex034/uploads/myriadrf/original/2X/e/e8a14e988c2e58ad2acf044f21f2e60c7c6309a8.jpeg)

Could you pls help me to check it? especially the part circled it?

Best Regards!

@martywittrock  
@gasparka

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**Author:** ![gasparka](https://avatars.discourse-cdn.com/v4/letter/g/a3d4f5/32.png) [@gasparka](https://discourse.myriadrf.org/u/gasparka)\
**Post date:** [22 January 2019 21:46 UTC](https://discourse.myriadrf.org/t/could-you-pls-help-me-to-check-the-connection-of-unused-volatage-pins/4052/2 "2019-01-22T21:46:21Z")

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Sorry, i have no experience with this.

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**Author:** ![Zack](https://yyz2.discourse-cdn.com/flex034/user_avatar/discourse.myriadrf.org/zack/32/89_2.png) [@Zack](https://discourse.myriadrf.org/u/Zack)\
**Post date:** [23 January 2019 09:14 UTC](https://discourse.myriadrf.org/t/could-you-pls-help-me-to-check-the-connection-of-unused-volatage-pins/4052/3 "2019-01-23T09:14:26Z")

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Hi @huangdeyong123,

Refer to LimeSDR-Mini 1v1 [schematic](https://github.com/myriadrf/LimeSDR-Mini/blob/master/hardware/1v1/Project%20Outputs%20for%20LimeSDR_Mini_1v1/LimeSDR_Mini_1v1_schematic_r1.PDF), where the internal LDOs are used.