# Reference Development Kit

**URL:** https://discourse.myriadrf.org/c/projects/reference-development-kit/5.md

[Latest](https://discourse.myriadrf.org/latest.md) · [Categories](https://discourse.myriadrf.org/categories.md)

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## [About the Reference Development Kit category](https://discourse.myriadrf.org/t/about-the-reference-platform-category/11)

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**Author:** [@system](https://discourse.myriadrf.org/u/system)\
**Replies:** 0

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## [The Myriad RF and DEO – Nano development project kit installation procedure](https://discourse.myriadrf.org/t/the-myriad-rf-and-deo-nano-development-project-kit-installation-procedure/12)

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**Author:** [@olee\_side](https://discourse.myriadrf.org/u/olee_side)\
**Replies:** 49\
**Last updated:** [15 April 2021 15:34 UTC](https://discourse.myriadrf.org/t/the-myriad-rf-and-deo-nano-development-project-kit-installation-procedure/12 "2021-04-15T15:34:46Z")

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After the following installation procedure, you will be able to control Myriad RF board via mini USB connector on the interface board, using the supplied GUI. Also the interface between FPGA and LMS6002DFN is configured…

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## [PLL Clock Input - Stand alone mode](https://discourse.myriadrf.org/t/pll-clock-input-stand-alone-mode/76)

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**Author:** [@mugilan\_july](https://discourse.myriadrf.org/u/mugilan_july)\
**Replies:** 2\
**Last updated:** [30 January 2020 10:09 UTC](https://discourse.myriadrf.org/t/pll-clock-input-stand-alone-mode/76 "2020-01-30T10:09:19Z")

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Hi, Im trying to make Myriad RF work in standalone.. We are using arduino for spi communication..Should I need to solder R49 resistor on-board for providing external PLL clock source (Through mmcx connector)..

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## [Myriad RF1 TX Test with external PLLCLK](https://discourse.myriadrf.org/t/myriad-rf1-tx-test-with-external-pllclk/646)

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**Author:** [@dareenh](https://discourse.myriadrf.org/u/dareenh)\
**Replies:** 7\
**Last updated:** [30 January 2020 09:35 UTC](https://discourse.myriadrf.org/t/myriad-rf1-tx-test-with-external-pllclk/646 "2020-01-30T09:35:40Z")

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Hi guys, I am working around LMS6002D reference kit, talking to my own microcontroller. I have so far able to configure its register via SPI, wrote and read it back correctly. Currently I am doing LO leakage TX test as…

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## [LMS6002D PLL is not loking](https://discourse.myriadrf.org/t/lms6002d-pll-is-not-loking/5049)

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**Author:** [@nsnreddym](https://discourse.myriadrf.org/u/nsnreddym)\
**Replies:** 0\
**Last updated:** [19 August 2019 07:16 UTC](https://discourse.myriadrf.org/t/lms6002d-pll-is-not-loking/5049 "2019-08-19T07:16:28Z")

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hi, I am working on MYRIAD-RF1 board(LMS6002D). I want to lock the TX frequency to 416.8MHz. So after power on i am updating the TX PLL registers(0x10,0x11,0x12,0x13) with approriate values. But the output is not coming…

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## [EVB7 board where to buy?](https://discourse.myriadrf.org/t/evb7-board-where-to-buy/4887)

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**Author:** [@mauro](https://discourse.myriadrf.org/u/mauro)\
**Replies:** 3\
**Last updated:** [2 July 2019 07:17 UTC](https://discourse.myriadrf.org/t/evb7-board-where-to-buy/4887 "2019-07-02T07:17:36Z")

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Hi, Where can I buy the EVB7 board (Lime lms7002evb)? There is also a STREAM board that complement the EVB7 board where can I get one of those also? Regards Mauro

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## [What is LimeSDR-Mini\_factory?](https://discourse.myriadrf.org/t/what-is-limesdr-mini-factory/4284)

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**Author:** [@gammaxy](https://discourse.myriadrf.org/u/gammaxy)\
**Replies:** 1\
**Last updated:** [5 March 2019 06:24 UTC](https://discourse.myriadrf.org/t/what-is-limesdr-mini-factory/4284 "2019-03-05T06:24:54Z")

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What is LimeSDR-Mini\_factory? I haven’t been able to find documentation that describes the intended purpose or usage of this code and how it relates to LimeSDR-Mini\_lms7\_trx. I did notice that it uses the Neo430 cpu co…

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## [Lime PCIE gateway project don't meet time requirements](https://discourse.myriadrf.org/t/lime-pcie-gateway-project-dont-meet-time-requirements/4191)

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**Author:** [@ti\_telecom](https://discourse.myriadrf.org/u/ti_telecom)\
**Replies:** 1\
**Last updated:** [14 February 2019 19:56 UTC](https://discourse.myriadrf.org/t/lime-pcie-gateway-project-dont-meet-time-requirements/4191 "2019-02-14T19:56:54Z")

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Hi, I am synthesizing the gateway project to LimePCIe in Quartus II 15.1, but the time requirements are not meet. Does anyone have the same problem? How could I proceed in this situation?

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## [SPI Problems, Pyboard](https://discourse.myriadrf.org/t/spi-problems-pyboard/452)

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**Author:** [@RoryM](https://discourse.myriadrf.org/u/RoryM)\
**Replies:** 41\
**Last updated:** [29 January 2019 12:57 UTC](https://discourse.myriadrf.org/t/spi-problems-pyboard/452 "2019-01-29T12:57:08Z")

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Hi, I'm trying to set up the LMS7002M over the SPI interface of a pyboard and can't get it to either write to or read from any of the registers. I'm taking my SPI output from the pyboard to the relevant pins of the J…

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## [TX/RX LPF DC offset Calibration on LMS6002D](https://discourse.myriadrf.org/t/tx-rx-lpf-dc-offset-calibration-on-lms6002d/163)

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**Author:** [@cory\_shol](https://discourse.myriadrf.org/u/cory_shol)\
**Replies:** 8\
**Last updated:** [22 December 2018 10:27 UTC](https://discourse.myriadrf.org/t/tx-rx-lpf-dc-offset-calibration-on-lms6002d/163 "2018-12-22T10:27:07Z")

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Hello, I am having trouble with Tx/RX LPF DC offset calibration routine. I am following Flow chart 4.3 in Programming and calibration guide 1.4 Last modified 11/06/2013 13:29:00. I am using zed board + zipper + Myr…

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## [uMyriadRF-LMS7002](https://discourse.myriadrf.org/t/umyriadrf-lms7002/1278)

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**Author:** [@robalenper](https://discourse.myriadrf.org/u/robalenper)\
**Replies:** 7\
**Last updated:** [29 October 2018 09:06 UTC](https://discourse.myriadrf.org/t/umyriadrf-lms7002/1278 "2018-10-29T09:06:46Z")

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@andrewback Do you know if there would be an interest in having uMyriadRF-LMS7002 kit with a FMC interconnect?

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## [MyriadRF-1 Board with external on-board clock generator](https://discourse.myriadrf.org/t/myriadrf-1-board-with-external-on-board-clock-generator/534)

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**Author:** [@dareenh](https://discourse.myriadrf.org/u/dareenh)\
**Replies:** 3\
**Last updated:** [23 October 2017 22:48 UTC](https://discourse.myriadrf.org/t/myriadrf-1-board-with-external-on-board-clock-generator/534 "2017-10-23T22:48:36Z")

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Hi guys, I am working on a project, using MyriadRF-1 board, my circumstances leads me to using my own microcontroller to talk to LMS6002D sitting on that board. Reference stated that we need an external PLL reference…

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## [Reference Dev Kit matching network and tuning](https://discourse.myriadrf.org/t/reference-dev-kit-matching-network-and-tuning/1766)

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**Author:** [@derekjg](https://discourse.myriadrf.org/u/derekjg)\
**Replies:** 4\
**Last updated:** [3 October 2017 08:43 UTC](https://discourse.myriadrf.org/t/reference-dev-kit-matching-network-and-tuning/1766 "2017-10-03T08:43:59Z")

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Hello all, I’m a new to this field of radios. I was wondering about this small phrase in the wiki (Myriad-RF 1 Connections - Myriad-RF Wiki): The RF board is tuned to support band 1 (Tx 2140 MHz and Rx 1950 MHz) and br…

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## [LMS6002 RF loopback and AUXPA settings](https://discourse.myriadrf.org/t/lms6002-rf-loopback-and-auxpa-settings/1727)

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**Author:** [@caralb](https://discourse.myriadrf.org/u/caralb)\
**Replies:** 1\
**Last updated:** [26 September 2017 11:38 UTC](https://discourse.myriadrf.org/t/lms6002-rf-loopback-and-auxpa-settings/1727 "2017-09-26T11:38:05Z")

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We are a R&D group located at Cordoba, Argentina, which is involved in projects in digital communications. We bought a LMS6002D EVB board and are implementing calibration procedures, using an FPGA development board as BB…

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## [TDD mode](https://discourse.myriadrf.org/t/tdd-mode/57)

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**Author:** [@keny](https://discourse.myriadrf.org/u/keny)\
**Replies:** 7\
**Last updated:** [29 August 2017 16:07 UTC](https://discourse.myriadrf.org/t/tdd-mode/57 "2017-08-29T16:07:47Z")

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What is the advantage of using TDD mode vs. FDD with both PLLs tuned to the same frequency and simply transmitting 0's when receiving?

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## [Digital interface components](https://discourse.myriadrf.org/t/digital-interface-components/158)

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**Author:** [@ritchy](https://discourse.myriadrf.org/u/ritchy)\
**Replies:** 8\
**Last updated:** [15 May 2017 12:26 UTC](https://discourse.myriadrf.org/t/digital-interface-components/158 "2017-05-15T12:26:22Z")

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Hi, I realized the pcb of the digital interface board (V1.0) and I am trying to solder the components . Should I welded components rated NF ?

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## [Register test Vtune failed](https://discourse.myriadrf.org/t/register-test-vtune-failed/1129)

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**Author:** [@lorenz](https://discourse.myriadrf.org/u/lorenz)\
**Replies:** 0\
**Last updated:** [18 April 2017 11:31 UTC](https://discourse.myriadrf.org/t/register-test-vtune-failed/1129 "2017-04-18T11:31:41Z")

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I have connected the Myriad RF with de0-nano board to a Windows 7 PC with USB and when executing the register test it says that the VTUNE register test failed. Testing TxRF SPI, Mask 0xAA: Module test with this patter…

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## [LMS6002D MyriadRF Dev Kit Application Note](https://discourse.myriadrf.org/t/lms6002d-myriadrf-dev-kit-application-note/978)

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**Author:** [@OoiEC](https://discourse.myriadrf.org/u/OoiEC)\
**Replies:** 0\
**Last updated:** [22 March 2017 06:13 UTC](https://discourse.myriadrf.org/t/lms6002d-myriadrf-dev-kit-application-note/978 "2017-03-22T06:13:32Z")

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Hi, I need help to find the application note for LMS6002D MyriadRF Dev Kit, Thanks.

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## [TX data format](https://discourse.myriadrf.org/t/tx-data-format/489)

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**Author:** [@norsecode](https://discourse.myriadrf.org/u/norsecode)\
**Replies:** 1\
**Last updated:** [13 March 2017 03:53 UTC](https://discourse.myriadrf.org/t/tx-data-format/489 "2017-03-13T03:53:58Z")

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Hi, I am using myriad-rf with LMS6002D chip, together with the zipper board and an altera FPGA. I see there is a 12 bit databus, with a qsel signal to indicate if the data is Q or I. According to the ADC spec I see t…

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## [Myriad-RF 1 and Zipper - programming SI5351](https://discourse.myriadrf.org/t/myriad-rf-1-and-zipper-programming-si5351/852)

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**Author:** [@mirabelle](https://discourse.myriadrf.org/u/mirabelle)\
**Replies:** 0\
**Last updated:** [2 March 2017 13:20 UTC](https://discourse.myriadrf.org/t/myriad-rf-1-and-zipper-programming-si5351/852 "2017-03-02T13:20:35Z")

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Hi everybody, I'm new on this blog. I bought a MyriadRf-1 and a Zipper board (V2R3 AZIO 2015 from Digikey). It seems to me, there is an error in the schematic Zipper board. The signal SDA\_C whitch is connected to the HMS…

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## [LMS6002d TX LO Leakage cancellation](https://discourse.myriadrf.org/t/lms6002d-tx-lo-leakage-cancellation/827)

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**Author:** [@dareenh](https://discourse.myriadrf.org/u/dareenh)\
**Replies:** 0\
**Last updated:** [24 February 2017 08:50 UTC](https://discourse.myriadrf.org/t/lms6002d-tx-lo-leakage-cancellation/827 "2017-02-24T08:50:23Z")

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Hi guys, I've been trying to calibrate the LMS6002D through SPI using my own microcontroller. Managed to get it through TX LO leakage test, and so does the RX test taught in "Myriad Development Kit" doc. Have also pa…

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## [LMS6002D ADC setting problem](https://discourse.myriadrf.org/t/lms6002d-adc-setting-problem/697)

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**Author:** [@dawi](https://discourse.myriadrf.org/u/dawi)\
**Replies:** 0\
**Last updated:** [8 February 2017 02:14 UTC](https://discourse.myriadrf.org/t/lms6002d-adc-setting-problem/697 "2017-02-08T02:14:36Z")

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Hello, I have a problem with BB-Loopback Mode test. I've tried to run BB-Loopback using FPGA's complex sin/cos signals and received signals(ADC out) are not clear. So, I turned on RXOUTSW(addr: 0x09) and checked the RXO…

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## [MyriadRF SPI register readout issue](https://discourse.myriadrf.org/t/myriadrf-spi-register-readout-issue/653)

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**Author:** [@reizei](https://discourse.myriadrf.org/u/reizei)\
**Replies:** 3\
**Last updated:** [6 February 2017 19:25 UTC](https://discourse.myriadrf.org/t/myriadrf-spi-register-readout-issue/653 "2017-02-06T19:25:23Z")

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Hello everybody, My request is a little bit tricky. Hence, I’ve to apologize for the long explanation of my work and the observed problem (at the end). Nevertheless, I hope someone can help me with this problem because…

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## [Read/Write to Myriad RF via SPI](https://discourse.myriadrf.org/t/read-write-to-myriad-rf-via-spi/503)

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**Author:** [@javia1492](https://discourse.myriadrf.org/u/javia1492)\
**Replies:** 1\
**Last updated:** [28 January 2017 01:14 UTC](https://discourse.myriadrf.org/t/read-write-to-myriad-rf-via-spi/503 "2017-01-28T01:14:36Z")

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Im lost on how to read/write data via the USB to the Myriad-RF1. I have the zipper interface board + myriad rf setup and i've looked through the documentation for programming of the device, but it doesnt say specifically…

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## [Rx Functionality Myriad RF-1 + Zipper](https://discourse.myriadrf.org/t/rx-functionality-myriad-rf-1-zipper/539)

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**Author:** [@javia1492](https://discourse.myriadrf.org/u/javia1492)\
**Replies:** 1\
**Last updated:** [28 January 2017 01:07 UTC](https://discourse.myriadrf.org/t/rx-functionality-myriad-rf-1-zipper/539 "2017-01-28T01:07:41Z")

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I'm trying to figure out how to get data on the RF FE for the Myriad-RF1 + Zipper but I am stuck. I've read the LMS6002D programming and Calibration guide as well as the Reference Development Kit PDF and LMS6002D Data Sh…

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## [30,72 clock](https://discourse.myriadrf.org/t/30-72-clock/191)

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**Author:** [@amina](https://discourse.myriadrf.org/u/amina)\
**Replies:** 7\
**Last updated:** [28 January 2017 01:02 UTC](https://discourse.myriadrf.org/t/30-72-clock/191 "2017-01-28T01:02:51Z")

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Hello, I have two Myriad- RF1 with deo nano FPGA. I want to know if the 30.72 clock must be supplied from the same generator for Transmitter and receiver ? when I send to my transmitter board a 30,72 clock from an…

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## [Zipper + Myriad RF Registers Test Failed](https://discourse.myriadrf.org/t/zipper-myriad-rf-registers-test-failed/520)

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**Author:** [@zhang111sd](https://discourse.myriadrf.org/u/zhang111sd)\
**Replies:** 1\
**Last updated:** [15 November 2016 22:05 UTC](https://discourse.myriadrf.org/t/zipper-myriad-rf-registers-test-failed/520 "2016-11-15T22:05:53Z")

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Now I am going to attach the zipper + 6002D to my FPGA development board (Arrow SoCKit) by HSMC. I power the zipper board by HSMC 12V by opening the SW1. But when I run registers test, TxPLL VTUNE and RxPLL VTUNE registe…

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## [I would like to know the SPI command initialization sequence (Code)](https://discourse.myriadrf.org/t/i-would-like-to-know-the-spi-command-initialization-sequence-code/508)

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**Author:** [@arkala80asc](https://discourse.myriadrf.org/u/arkala80asc)\
**Replies:** 0\
**Last updated:** [18 October 2016 05:16 UTC](https://discourse.myriadrf.org/t/i-would-like-to-know-the-spi-command-initialization-sequence-code/508 "2016-10-18T05:16:28Z")

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I would like to know the SPI command initialization sequence (Code) in order to perform read/write the SPI registers in LMS6002. Basically I am stuck at initial settings that would be required before we start read/write …

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## [Myriad-RF Transmit I/Q Balance Calibration](https://discourse.myriadrf.org/t/myriad-rf-transmit-i-q-balance-calibration/499)

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**Author:** [@javia1492](https://discourse.myriadrf.org/u/javia1492)\
**Replies:** 2\
**Last updated:** [13 October 2016 20:34 UTC](https://discourse.myriadrf.org/t/myriad-rf-transmit-i-q-balance-calibration/499 "2016-10-13T20:34:02Z")

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I am trying to better understand the requirements for properly calibration the Myriad-RF board and specifically the LMS6002D chip. The Transmist I/Q Balance Calibration is relatively vague on what needs to be done, but o…

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## [TX PLL programming (VCO and VCOCAP Code Selection)](https://discourse.myriadrf.org/t/tx-pll-programming-vco-and-vcocap-code-selection/474)

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**Author:** [@norsecode](https://discourse.myriadrf.org/u/norsecode)\
**Replies:** 0\
**Last updated:** [1 September 2016 12:35 UTC](https://discourse.myriadrf.org/t/tx-pll-programming-vco-and-vcocap-code-selection/474 "2016-09-01T12:35:40Z")

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Hi, Trying to follow the VCO and VCOCAP Code Selection algorithm so I can program the TX PLL to my desired frequency. I start out with a reference clock of 25 MHz and want to program my TX PLL to 2140 MHz. Then calcul…

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