Projects   Reference Development Kit

About the Reference Development Kit category (1)
Lime PCIE gateway project don't meet time requirements (2)
SPI Problems, Pyboard ( 2 3 ) (42)
TX/RX LPF DC offset Calibration on LMS6002D (9)
uMyriadRF-LMS7002 (8)
MyriadRF-1 Board with external on-board clock generator (4)
Reference Dev Kit matching network and tuning (5)
LMS6002 RF loopback and AUXPA settings (2)
TDD mode (8)
Digital interface components (9)
Register test Vtune failed (1)
LMS6002D MyriadRF Dev Kit Application Note (1)
TX data format (2)
Myriad-RF 1 and Zipper - programming SI5351 (1)
LMS6002d TX LO Leakage cancellation (1)
LMS6002D ADC setting problem (1)
MyriadRF SPI register readout issue (4)
Read/Write to Myriad RF via SPI (2)
Rx Functionality Myriad RF-1 + Zipper (2)
30,72 clock (8)
Myriad RF1 TX Test with external PLLCLK (7)
Zipper + Myriad RF Registers Test Failed (2)
I would like to know the SPI command initialization sequence (Code) (1)
Myriad-RF Transmit I/Q Balance Calibration (3)
TX PLL programming (VCO and VCOCAP Code Selection) (1)
Myriad RF board SPI control in standalone mode (1)
Connect Myriad-RF 1 on zipper board on xilinux FPGA using FMC interface (1)
USB_SPI sketch (5)
Programming the clock generator (Si5356) on the zipper board (3)
External Power Amplifiers (8)