Projects   Reference Development Kit


Topic Replies Activity
About the Reference Development Kit category 1 November 2, 2014
What is LimeSDR-Mini_factory? 2 March 5, 2019
Lime PCIE gateway project don't meet time requirements 2 February 14, 2019
SPI Problems, Pyboard 42 January 29, 2019
TX/RX LPF DC offset Calibration on LMS6002D 9 December 22, 2018
uMyriadRF-LMS7002 8 October 29, 2018
MyriadRF-1 Board with external on-board clock generator 4 October 23, 2017
Reference Dev Kit matching network and tuning 5 October 3, 2017
LMS6002 RF loopback and AUXPA settings 2 September 26, 2017
TDD mode 8 August 29, 2017
Digital interface components 9 May 15, 2017
Register test Vtune failed 1 April 18, 2017
LMS6002D MyriadRF Dev Kit Application Note 1 March 22, 2017
TX data format 2 March 13, 2017
Myriad-RF 1 and Zipper - programming SI5351 1 March 2, 2017
LMS6002d TX LO Leakage cancellation 1 February 24, 2017
LMS6002D ADC setting problem 1 February 8, 2017
MyriadRF SPI register readout issue 4 February 6, 2017
Read/Write to Myriad RF via SPI 2 January 28, 2017
Rx Functionality Myriad RF-1 + Zipper 2 January 28, 2017
30,72 clock 8 January 28, 2017
Myriad RF1 TX Test with external PLLCLK 7 January 26, 2017
Zipper + Myriad RF Registers Test Failed 2 November 15, 2016
I would like to know the SPI command initialization sequence (Code) 1 October 18, 2016
Myriad-RF Transmit I/Q Balance Calibration 3 October 13, 2016
TX PLL programming (VCO and VCOCAP Code Selection) 1 September 1, 2016
Myriad RF board SPI control in standalone mode 1 August 26, 2016
Connect Myriad-RF 1 on zipper board on xilinux FPGA using FMC interface 1 August 17, 2016
USB_SPI sketch 5 July 29, 2016
Programming the clock generator (Si5356) on the zipper board 3 July 25, 2016