LimeSDR, GSM with omso

I found on my computer soapy version 0.6 can detect my limesdr board while 0.7 can’t

also the newest version of soapyuhd has problem.

you can go on github find the repository you want and click releases, you will find all old versions.

Here’s an example:

The later versions of osmo-trx specify antenna in the osmo-trx.cfg file:

trx
 chan 0
   rx-path LNAW
   tx-path BAND1

any update on OsmoTRX integration via limesuit va lms api?

Please see http://osmocom.org/issues/2919 for updates on this. Progress is unfortunately slow due to a variety of issues, including us at sysmocom having apparently too old and now unsupported v1.0 hardware. We’ve also hit https://github.com/myriadrf/LimeSuite/issues/193 and https://github.com/myriadrf/LimeSuite/issues/184 during development, and we still are unable to explain why the Tx GSM signal looks great on a LimeSDR-mini 1.1 but way out of spec on LimeSDR (classic/USB). Feel free to join the thread at http://osmocom.org/issues/2919 and/or help with development and testing. Thanks for your patience!

1 Like

Thanks for the reply, but I couldn’t find this configuration file.

I finally got my hand on an RTL-SDR

just to clarify, I’m using limeSDR board 1.45, with TX1_1 and TX1_2 connected to antennas and RX1_H and RX_L also connected to antennas.

as you can see in the attached picture, I have everything setup as it should be, but I still can’t see the network, and I don’t think the board is transmitting even though it’s getting HOT !

attached are the pictures of the setup and reading from RTL-SDR

Any ideas ?

That actually looks like a low gain version of what I first got: OpenBTS 1st test
The solution then was to use the switches: osmo-trx -f -e
Then preferred was: osmo-trx -f -s4 -b4

For the new version, -f is, ah I think, this C0 Filler Table in the vty (telnet 0 4237)

OsmoTRX> show trx
TRX Config:
 Local IP: 127.0.0.1
 Remote IP: 127.0.0.1
 TRX Base Port: 5700
 Device args: (null)
 Tx Samples-per-Symbol: 4                     <--   -s4
 Rx Samples-per-Symbol: 4                    <--   -s4
 Test Mode: TSC: 0 (Disabled)
 Test Mode: RACH Delay: 0 (Disabled)
 C0 Filler Table: Disabled                        <-- should be Enabled for OpenBTS
 Clock Reference: internal
 Multi-Carrier: Disabled
 Tuning offset: 0.000000
 RSSI to dBm offset: 0.000000
 Swap channels: Disabled
 EDGE support: Disabled                        <--  -e
 Real Time Priority: 0 (Disabled)
 Channels: 1
  Channel 0:
   Rx Path: LNAW
   Tx Path: BAND1
1 Like

I have encountered the same problem. I still don’t know how to solve it after reading other people’s responses. Did you finally solve the problem?

After about a day’s worth of work, I can launch osmo-trx-uhd with the new LimeSDR mini that was shipped in July 2018.

But, I can’t get any radio samples/data flowing using osmo-trx. See the below. The config I am using for this LimeSDR mini is the same as LimeSDR (with the IP addresses for my setup). My core is on a separate IP. That same core works fine with an Ettus UHD/radio setup also with osmo-trx.

Any ideas?

root@11244:/usr/src/Packages/LimeSDR/osmo/osmo-trx/osmo-trx/Transceiver52M# ./osmo-trx-uhd -C ./limesdr.cfg
linux; GNU C++ version 5.4.0 20160609; Boost_105800; UHD_003.010.002.HEAD-0-gbd6e21dc

Info: SSE3 support compiled in and supported by CPU
Info: SSE4.1 support compiled in and supported by CPU
Tue Jul 24 17:59:36 2018 DLGLOBAL <0002> telnet_interface.c:104 telnet at 127.0.0.1 4237
Tue Jul 24 17:59:36 2018 DLCTRL <0009> control_if.c:887 CTRL at 127.0.0.1 4236
Config Settings
Log Level… 3
Device args…
TRX Base Port… 5700
TRX Address… 10.0.0.10
GSM BTS Address… 10.0.0.17
Channels… 1
Tx Samples-per-Symbol… 4
Rx Samples-per-Symbol… 4
EDGE support… 0
Reference… 0
C0 Filler Table… 1
Multi-Carrier… 0
Tuning offset… 0
RSSI to dBm offset… 0
Swap channels… 0
Tx Antennas… ‘BAND1’
Rx Antennas… ‘LNAW’

Tue Jul 24 17:59:37 2018 DMAIN <0000> UHDDevice.cpp:629 [tid=139843618219840] Using discovered UHD device addr=24607:1027,driver=lime,label=LimeSDR Mini [USB 2.0] 1D40EB9F61A628,media=USB 2.0,module=uLimeSDR,name=LimeSDR Mini,serial=1D40EB9F61A628,type=soapy
– Make connection: ‘LimeSDR Mini [USB 2.0] 1D40EB9F61A628’
– Device name: LimeSDR-mini
– Reference: 40 MHz
– Init LMS7002M(0)
– Ver=7, Rev=1, Mask=1
– LMS7002M calibration values caching Disable
Tue Jul 24 17:59:42 2018 DMAIN <0000> UHDDevice.cpp:203 [tid=139843618219840] Antennas configured successfully
Tue Jul 24 17:59:42 2018 DMAIN <0000> UHDDevice.cpp:447 [tid=139843618219840] Rates configured for LimeSDR 4 SPS
Tue Jul 24 17:59:43 2018 DMAIN <0000> UHDDevice.cpp:407 [tid=139843618219840] Supported Tx gain range [-52; 0]
Tue Jul 24 17:59:43 2018 DMAIN <0000> UHDDevice.cpp:412 [tid=139843618219840] Supported Rx gain range [-12; 61]
Tue Jul 24 17:59:43 2018 DMAIN <0000> UHDDevice.cpp:416 [tid=139843618219840] Default setting Tx gain for channel 0 to -26
Tue Jul 24 17:59:43 2018 DMAIN <0000> UHDDevice.cpp:423 [tid=139843618219840] Default setting Rx gain for channel 0 to 24.5
Tue Jul 24 17:59:43 2018 DMAIN <0000> UHDDevice.cpp:723 [tid=139843618219840]
Single USRP:
Device: uLimeSDR
Mboard 0: LimeSDR-mini
RX Channel: 0
RX DSP: 0
RX Dboard: 0
RX Subdev: SoapyRF
RX Channel: 1
RX DSP: 1
RX Dboard: 1
RX Subdev: SoapyRF
TX Channel: 0
TX DSP: 0
TX Dboard: 0
TX Subdev: SoapyRF
TX Channel: 1
TX DSP: 1
TX Dboard: 1
TX Subdev: SoapyRF
– Transceiver active with 1 channel(s)
Tue Jul 24 18:00:30 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is POWEROFF
Tue Jul 24 18:00:30 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETTSC 2
Tue Jul 24 18:00:30 2018 DMAIN <0000> Transceiver.cpp:811 [tid=139843618547456] Changing TSC from 0 to 2
Tue Jul 24 18:00:30 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is RXTUNE 892200
Tue Jul 24 18:00:30 2018 DMAIN <0000> UHDDevice.cpp:1111 [tid=139843618547456]
Tune Result:
Target RF Freq: 892.200000 (MHz)
Actual RF Freq: 892.199993 (MHz)
Target DSP Freq: -0.000007 (MHz)
Actual DSP Freq: -0.000006 (MHz)

Tue Jul 24 18:00:30 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is TXTUNE 937200
Tue Jul 24 18:00:30 2018 DMAIN <0000> UHDDevice.cpp:1111 [tid=139843618547456]
Tune Result:
Target RF Freq: 937.200000 (MHz)
Actual RF Freq: 937.199993 (MHz)
Target DSP Freq: 0.000007 (MHz)
Actual DSP Freq: 0.000006 (MHz)

Tue Jul 24 18:00:30 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is POWERON
Tue Jul 24 18:00:30 2018 DMAIN <0000> Transceiver.cpp:238 [tid=139843618547456] Starting the transceiver
Tue Jul 24 18:00:30 2018 DMAIN <0000> radioInterface.cpp:168 [tid=139843618547456] Starting radio device
Tue Jul 24 18:00:30 2018 DMAIN <0000> UHDDevice.cpp:801 [tid=139843618547456] Starting USRP…
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 0
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 1
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 2
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 3
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 4
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 5
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 6
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 7
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 8
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 9
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 10
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 11
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 12
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 13
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 14
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 15
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:766 [tid=139843618547456] Device timed out
Tue Jul 24 18:00:31 2018 DMAIN <0000> Transceiver.cpp:246 [tid=139843618547456] Device failed to start
Tue Jul 24 18:00:31 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETPOWER 43
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:479 [tid=139843618547456] Set TX gain to -44dB (asked for -43dB)
Tue Jul 24 18:00:31 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETMAXDLY 5
Tue Jul 24 18:00:31 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETRXGAIN 47
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:494 [tid=139843618547456] Set RX gain to 47dB (asked for 47dB)
Tue Jul 24 18:00:31 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 0 5
Tue Jul 24 18:00:31 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 1 7
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 0
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 1
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 2
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 3
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 4
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 5
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 6
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 7
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 8
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 9
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 10
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 11
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 12
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 13
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 14
Tue Jul 24 18:00:31 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 15
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 2 0
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 3 0
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 4 0
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 5 0
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 6 0
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 7 0
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 2 13
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 3 13
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 4 13
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 5 13
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 6 13
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETSLOT 7 13
Tue Jul 24 18:00:32 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139843618547456] command is SETPOWER 43
Tue Jul 24 18:00:32 2018 DMAIN <0000> UHDDevice.cpp:479 [tid=139843618547456] Set TX gain to -44dB (asked for -43dB)
Tue Jul 24 18:00:32 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 0
Tue Jul 24 18:00:32 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 1
Tue Jul 24 18:00:32 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 2
Tue Jul 24 18:00:32 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 3
Tue Jul 24 18:00:32 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 4
Tue Jul 24 18:00:32 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 5
Tue Jul 24 18:00:32 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 6
Tue Jul 24 18:00:32 2018 DMAIN <0000> UHDDevice.cpp:349 [tid=139843391731456] transfer timed out 7

Sadly, no.

I stopped trying after a while. will continue soon.

what is the issue that you are having exactly ?

OK. Making progress after lots of effort.

Now, the issue with LimeSDR mini seems to be related to the clock. I have a high quality 52 Mhz reference that I would like to use. How do I enable this?

Note that within about a minute, the “VCO” frequency goes from 5 Mhz to 2 Mhz then to 7 Mhz. Although I have a BTS “successfully” sending/receiving data, there is no beacon visible to phones and also an RF sweep (at least in the range I am expecting) doesn’t pick anything up either.

Thanks, John

root@11244:/usr/src/Packages/LimSDR/osmo/osmo-trx/osmo-trx/Transceiver52M# ./osmo-trx-lms -C limesdr.cfg
Info: SSE3 support compiled in and supported by CPU
Info: SSE4.1 support compiled in and supported by CPU
Wed Jul 25 03:59:31 2018 DLGLOBAL <0002> telnet_interface.c:104 telnet at 127.0.0.1 4237
Wed Jul 25 03:59:31 2018 DLCTRL <0009> control_if.c:887 CTRL at 127.0.0.1 4236
Config Settings
Log Level… 3
Device args…
TRX Base Port… 5700
TRX Address… 10.0.0.10
GSM BTS Address… 10.0.0.17
Channels… 1
Tx Samples-per-Symbol… 4
Rx Samples-per-Symbol… 4
EDGE support… 1
Reference… 0
C0 Filler Table… 3
Multi-Carrier… 0
Tuning offset… 0
RSSI to dBm offset… 0
Swap channels… 0
Tx Antennas… ‘’
Rx Antennas… ‘’

Wed Jul 25 03:59:31 2018 DMAIN <0000> LMSDevice.cpp:49 [tid=139944402042688] creating LMS device…
Wed Jul 25 03:59:31 2018 DMAIN <0000> LMSDevice.cpp:99 [tid=139944402042688] Opening LMS device…
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] Claimed Interface
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] Estimated reference clock 40.0015 MHz
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] Reference clock 40.00 MHz
Wed Jul 25 03:59:31 2018 DMAIN <0000> LMSDevice.cpp:126 [tid=139944402042688] Init LMS device
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] INT 121, FRAC 0, DIV_LOCH 1, EN_DIV2_DIVPROG 0
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCO 5000.00 MHz, RefClk 40.00 MHz
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] ICT_VCO: 180
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=64 cmphl=0
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=96 cmphl=0
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=112 cmphl=0
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=120 cmphl=0
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=124 cmphl=0
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=126 cmphl=0
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=127 cmphl=0
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] Failed to lock
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=192 cmphl=0
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=224 cmphl=2
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=240 cmphl=3
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=232 cmphl=3
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=228 cmphl=2
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=230 cmphl=3
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=229 cmphl=2
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] CSW: lowest=222, highest=229, selected=225
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] cmphl=2
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCOL : csw=225 tune ok
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] ICT_VCO: 180
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] TuneVCO(SXT) - VCO too high
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCOM : csw=0 tune fail
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] ICT_VCO: 180
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] TuneVCO(SXT) - VCO too high
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCOH : csw=0 tune fail
Wed Jul 25 03:59:31 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] Selected: VCOL
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] INT 116, FRAC 0, DIV_LOCH 1, EN_DIV2_DIVPROG 0
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCO 4800.00 MHz, RefClk 40.00 MHz
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] ICT_VCO: 180
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=64 cmphl=0
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=96 cmphl=0
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=112 cmphl=0
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=120 cmphl=0
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=124 cmphl=0
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=126 cmphl=0
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=127 cmphl=0
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] Failed to lock
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=192 cmphl=0
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=224 cmphl=3
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=208 cmphl=3
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=200 cmphl=2
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=204 cmphl=3
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=202 cmphl=2
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw=203 cmphl=3
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] Failed to lock
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] cmphl=2
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCOL : csw=200 tune ok
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] ICT_VCO: 180
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] TuneVCO(SXR) - VCO too high
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCOM : csw=0 tune fail
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] ICT_VCO: 180
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] TuneVCO(SXR) - VCO too high
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCOH : csw=0 tune fail
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] Selected: VCOL
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] INT 57, FRAC 385875, DIV_OUTCH_CGEN 18
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCO 2334.72 MHz, RefClk 40.00 MHz
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw 157; interval [154, 160]
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] INT 57, FRAC 385875, DIV_OUTCH_CGEN 18
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCO 2334.72 MHz, RefClk 40.00 MHz
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw 157; interval [154, 160]
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] M=160, N=4, Fvco=614.400 MHz
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] M=160, N=4, Fvco=614.400 MHz
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] INT 54, FRAC 489335, DIV_OUTCH_CGEN 7
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCO 2218.67 MHz, RefClk 40.00 MHz
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw 131; interval [128, 135]
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] INT 54, FRAC 489335, DIV_OUTCH_CGEN 7
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCO 2218.67 MHz, RefClk 40.00 MHz
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw 132; interval [128, 136]
Wed Jul 25 03:59:32 2018 DMAIN <0000> LMSDevice.cpp:203 [tid=139944402042688] Antennas configured successfully
Wed Jul 25 03:59:32 2018 DMAIN <0000> LMSDevice.cpp:186 [tid=139944402042688] Setting LPFBW chan 0
Wed Jul 25 03:59:32 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 11 ms
Wed Jul 25 03:59:34 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 0 ms
Wed Jul 25 03:59:34 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU Ref. clock: 40 MHz
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 0 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 170 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] RX LPF configured
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] INT 57, FRAC 385875, DIV_OUTCH_CGEN 18
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCO 2334.72 MHz, RefClk 40.00 MHz
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw 157; interval [154, 160]
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 0 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 0 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU Ref. clock: 40 MHz
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 0 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 61 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] Filter calibrated. Filter order-4th, filter bandwidth set to 5.2 MHz.Real pole 1st order filter set to 2.5 MHz. Preemphasis filter not active
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] INT 57, FRAC 385875, DIV_OUTCH_CGEN 18
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] VCO 2334.72 MHz, RefClk 40.00 MHz
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] csw 157; interval [154, 160]
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] TX LPF configured
Wed Jul 25 03:59:35 2018 DMAIN <0000> LMSDevice.cpp:191 [tid=139944402042688] Calibrating chan 0
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 0 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 0 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 0 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 89 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] Rx calibration finished
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 0 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 0 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 0 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] MCU algorithm time: 222 ms
Wed Jul 25 03:59:35 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402042688] Tx calibration finished
– Transceiver active with 1 channel(s)
Wed Jul 25 04:00:02 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is POWEROFF
Wed Jul 25 04:00:02 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETTSC 2
Wed Jul 25 04:00:02 2018 DMAIN <0000> Transceiver.cpp:811 [tid=139944402351872] Changing TSC from 0 to 2
Wed Jul 25 04:00:02 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is RXTUNE 892200
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] INT 85, FRAC 230686, DIV_LOCH 2, EN_DIV2_DIVPROG 1
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] VCO 7137.60 MHz, RefClk 40.00 MHz
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] ICT_VCO: 180
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] TuneVCO(SXR) - VCO too low
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] VCOL : csw=0 tune fail
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] ICT_VCO: 180
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] TuneVCO(SXR) - VCO too low
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] VCOM : csw=0 tune fail
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] ICT_VCO: 180
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=64 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=96 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=112 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=120 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=124 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=126 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=127 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] Failed to lock
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=192 cmphl=3
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=160 cmphl=3
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=144 cmphl=2
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=152 cmphl=2
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=156 cmphl=2
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=158 cmphl=2
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=159 cmphl=2
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] CSW: lowest=139, highest=159, selected=149
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] cmphl=2
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] VCOH : csw=149 tune ok
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] Selected: VCOH
Wed Jul 25 04:00:02 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is TXTUNE 937200
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] INT 89, FRAC 754974, DIV_LOCH 2, EN_DIV2_DIVPROG 1
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] VCO 7497.60 MHz, RefClk 40.00 MHz
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] ICT_VCO: 180
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] TuneVCO(SXT) - VCO too low
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] VCOL : csw=0 tune fail
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] ICT_VCO: 180
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] TuneVCO(SXT) - VCO too low
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] VCOM : csw=0 tune fail
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] ICT_VCO: 180
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=64 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=96 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=112 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=120 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=124 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=126 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=127 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] Failed to lock
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=192 cmphl=0
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=224 cmphl=3
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=208 cmphl=2
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=216 cmphl=3
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=212 cmphl=2
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=214 cmphl=2
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] csw=215 cmphl=2
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] CSW: lowest=195, highest=215, selected=205
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] cmphl=2
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] VCOH : csw=205 tune ok
Wed Jul 25 04:00:02 2018 DLMS <0001> LMSDevice.cpp:74 [tid=139944402351872] Selected: VCOH
Wed Jul 25 04:00:07 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is POWERON
Wed Jul 25 04:00:07 2018 DMAIN <0000> Transceiver.cpp:238 [tid=139944402351872] Starting the transceiver
Wed Jul 25 04:00:07 2018 DMAIN <0000> radioInterface.cpp:168 [tid=139944402351872] Starting radio device
Wed Jul 25 04:00:07 2018 DMAIN <0000> LMSDevice.cpp:212 [tid=139944402351872] starting LMS…
Wed Jul 25 04:00:07 2018 DMAIN <0000> LMSDevice.cpp:315 [tid=139944402351872] Setting TX gain to 36.5 dB.
Wed Jul 25 04:00:07 2018 DMAIN <0000> LMSDevice.cpp:335 [tid=139944402351872] Setting RX gain to 34 dB.
Wed Jul 25 04:00:07 2018 DMAIN <0000> LMSDevice.cpp:382 [tid=139944402351872] Initial timestamp 27500
Wed Jul 25 04:00:07 2018 DMAIN <0000> radioInterface.cpp:189 [tid=139944402351872] Radio started
Wed Jul 25 04:00:07 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETPOWER 21
Wed Jul 25 04:00:07 2018 DMAIN <0000> LMSDevice.cpp:315 [tid=139944402351872] Setting TX gain to 52 dB.
Wed Jul 25 04:00:07 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2169652
Wed Jul 25 04:00:07 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETMAXDLY 5
Wed Jul 25 04:00:07 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETRXGAIN 57
Wed Jul 25 04:00:07 2018 DMAIN <0000> LMSDevice.cpp:335 [tid=139944402351872] Setting RX gain to 57 dB.
Wed Jul 25 04:00:07 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETSLOT 0 5
Wed Jul 25 04:00:07 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETSLOT 1 7
Wed Jul 25 04:00:08 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETSLOT 2 0
Wed Jul 25 04:00:08 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETSLOT 3 0
Wed Jul 25 04:00:08 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETSLOT 4 0
Wed Jul 25 04:00:08 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETSLOT 5 0
Wed Jul 25 04:00:08 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETSLOT 6 0
Wed Jul 25 04:00:08 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETSLOT 7 0
Wed Jul 25 04:00:08 2018 DMAIN <0000> Transceiver.cpp:709 [tid=139944402351872] command is SETPOWER 21
Wed Jul 25 04:00:08 2018 DMAIN <0000> LMSDevice.cpp:315 [tid=139944402351872] Setting TX gain to 52 dB.
Wed Jul 25 04:00:08 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2169868
Wed Jul 25 04:00:09 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2170085
Wed Jul 25 04:00:10 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2170301
Wed Jul 25 04:00:11 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2170518
Wed Jul 25 04:00:12 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2170734
Wed Jul 25 04:00:13 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2170951
Wed Jul 25 04:00:14 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2171167
Wed Jul 25 04:00:15 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2171384
Wed Jul 25 04:00:16 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2171601
Wed Jul 25 04:00:17 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2171817
Wed Jul 25 04:00:18 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2172034
Wed Jul 25 04:00:19 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2172250
Wed Jul 25 04:00:20 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2172467
Wed Jul 25 04:00:21 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2172683
Wed Jul 25 04:00:22 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2172900
Wed Jul 25 04:00:23 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2173116
Wed Jul 25 04:00:24 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2173333
Wed Jul 25 04:00:25 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2173549
Wed Jul 25 04:00:26 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2173766
Wed Jul 25 04:00:27 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2173982
Wed Jul 25 04:00:28 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2174199
Wed Jul 25 04:00:29 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2174415
Wed Jul 25 04:00:30 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2174632
Wed Jul 25 04:00:31 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2174848
Wed Jul 25 04:00:32 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2175065
Wed Jul 25 04:00:33 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2175281
Wed Jul 25 04:00:34 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2175498
Wed Jul 25 04:00:35 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2175714
Wed Jul 25 04:00:36 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2175931
Wed Jul 25 04:00:37 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2176147
Wed Jul 25 04:00:38 2018 DMAIN <0000> Transceiver.cpp:1018 [tid=139944402286336] ClockInterface: sending IND CLOCK 2176364

In short:

  • Avoid using OsmoTRX via SoapySDR and UHD from now
  • Build Lime Suite from git master
  • Build OsmoTRX from git master and configure with LMS support
  • Use osmo-trx-lms

Direct LMS API integration has been done and should be far more robust/reliable.

Looks like Osmocom wiki is yet to be updated and there will be a how-to guide in due course.

1 Like

does that mean that I can use the osmo stack for a full GSM network ?

I mean is it easier than going to openBTS with osmo-trx ?

Yes, GSM voice plus GPRS.

For me it is, yes, because I’m not familiar with OpenBTS, but I am familiar with Osmocom. “easier” is pretty subjective :slight_smile:

1 Like

hmmmm ,
I’m going to start trying with OpenBTS. however, is there a simple guide for osmo ?
if you guys are working on one and want someone to test, I am willing to give it a try.

hey andewback

shoud I follow the instructions here for building osmo-trx ? (libsomocore doesn’t exist anymore)

also how to configure the LMS support ?

should I try or just wait for the how-to-guide ?

Thanks in advance

Is libosmocore, not libsomocore
The author has made a mistake
https://osmocom.org/projects/libosmocore/wiki/Libosmocore

Thanks for the correction.

I was following this link
https://osmocom.org/projects/osmotrx/wiki/LimeSDR_Build_From_Source

but now I realise that this uses omso-trx with UHD and soapySDR. which what andrew did not recommend.

so how do I compile the osmo-trx with LMS support ( the command doesn’t even work with the current compiled version of osmo-trx)

any help is highly appriiciated

Use that guide, but in the configure step specify to build with LMS driver support, i.e.:

./configure --with-lms

You can still install SoapySDR and UHD if you like, but they are not needed and don’t try using osmo-trx-uhd binary if this gets built. Use osmo-trx-lms instead.

Thanks,

I was able to configure and get the command running

Lime Suite can see the limeSDR, however I get the following error:
Info: SSE3 support compiled in and supported by CPU
Info: SSE4.1 support compiled in and supported by CPU
Sun Jul 29 07:01:27 2018 DLGLOBAL <0002> telnet_interface.c:104 telnet at 127.0.0.1 4237
Sun Jul 29 07:01:27 2018 DLCTRL <0009> control_if.c:887 CTRL at 127.0.0.1 4236
Config Settings
Log Level… 3
Device args…
TRX Base Port… 5700
TRX Address… 127.0.0.1
GSM BTS Address… 127.0.0.1
Channels… 1
Tx Samples-per-Symbol… 4
Rx Samples-per-Symbol… 4
EDGE support… 0
Reference… 0
C0 Filler Table… 1
Multi-Carrier… 0
Tuning offset… 0
RSSI to dBm offset… 0
Swap channels… 0
Tx Antennas… ‘BAND1’
Rx Antennas… ‘LNAW’

Setting SCHED_RR priority(18)
Sun Jul 29 07:01:27 2018 DMAIN <0000> osmo-trx.cpp:379 [tid=140014553808704] Config: Setting SCHED_RR failed

I tried using the configuration file from the osmo-trx git url and the below file as well. both gave the same result.

https://osmocom.org/attachments/3219/limesdr.cfg

Any idea what am I doing wrong ?

I’ve not seen this before. Please post details to the appropriate Osmocom mailing list.